Search Results 1-20 of 444

  • An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis

    LEE Pil-Ho , HWANG Yu-Jeong , LEE Han-Yeol , LEE Hyun-Bae , JANG Young-Chan

    … An on-chip monitoring circuit using a sub-sampling scheme, which consists of a 6-bit flash analog-to-digital converter (ADC) and a 51-phase phase-locked loop (PLL)-based frequency synthesizer, is proposed to analyze the signal integrity of a single-ended 8-Gb/s octal data rate (ODR) chip-to-chip interface with a source synchronous clocking scheme. …

    IEICE Transactions on Electronics E99.C(4), 440-443, 2016

    J-STAGE CrossRef

  • All-optically stabilized frequency comb

    Okubo Sho , Gunji Kenta , Onae Atsushi , Schramm Malte , Nakamura Keisuke , Hong Feng-Lei , Hattori Toshiaki , Hosaka Kazumoto , Inaba Hajime

    … The mode-locked fiber laser has two frequency-control actuators that are pump laser powers for erbium-doped and ytterbium-doped fibers. … We investigate the frequency-control characteristics of the mode-locked laser and find that the fixed points for the two actuators are sufficiently apart from each other, realizing the simultaneous phase locking of the repetition and carrier envelope offset frequencies. …

    Appl. Phys. Express 8(12), 122701, 2015-11-02

    JSAP

  • Novel phase-locking schemes for the carrier envelope offset frequency of an optical frequency comb

    Okubo Sho , Onae Atsushi , Hosaka Kazumoto , Sera Hideyuki , Inaba Hajime , Hong Feng-Lei

    … We propose simple schemes to phase-lock the carrier envelope offset frequency (f<inf>ceo</inf>) referring to the repetition rate (f<inf>rep</inf>) of an optical frequency comb. … is the averaging time of the frequency measurement. … These new locking schemes simplify the sign and mode-number determination in frequency measurements. …

    Appl. Phys. Express 8(11), 112402, 2015-10-15

    JSAP

  • Ultra-broadband dual-comb spectroscopy across 1.0–1.9 µm

    Okubo Sho , Iwakuni Kana , Inaba Hajime , Hosaka Kazumoto , Onae Atsushi , Sasada Hiroyuki , Hong Feng-Lei

    … We have carried out dual-comb spectroscopy and observed in a simultaneous acquisition a 140-THz-wide spectrum from 1.0 to 1.9 µm using two fiber-based frequency combs phase-locked to each other. …

    Appl. Phys. Express 8(8), 082402, 2015-07-15

    JSAP

  • Ultra-Low Phase Noise Frequency Synthesizer for up to 28Gbps 60GHz Wireless Transceivers

    MUSA Ahmed , OKADA Kenichi , MATSUZAWA Akira

    … Phase noise of the synthesizer used in transceivers has a significant impact on the achievable performance. … In this work, a 60GHz quadrature PLL frequency synthesizer for IEEE802.15.3c with wide tuning range and low phase noise is introduced. … The synthesizer is constructed using a 20GHz PLL that is coupled with a Quadrature Injection Locked Oscillator (QILO) as a frequency tripler to generate the 60GHz signal. …

    Technical report of IEICE. ICD 114(499), 67-72, 2015-02-26

    CiNii Fulltext PDF - Limited 

  • Ultra-Low Phase Noise Frequency Synthesizer for up to 28Gbps 60GHz Wireless Transceivers

    MUSA Ahmed , OKADA Kenichi , MATSUZAWA Akira

    … Phase noise of the synthesizer used in transceivers has a significant impact on the achievable performance. … In this work, a 60GHz quadrature PLL frequency synthesizer for IEEE802.15.3c with wide tuning range and low phase noise is introduced. … The synthesizer is constructed using a 20GHz PLL that is coupled with a Quadrature Injection Locked Oscillator (QILO) as a frequency tripler to generate the 60GHz signal. …

    IEICE technical report. Microwaves 114(498), 67-72, 2015-02-26

    CiNii Fulltext PDF - Limited 

  • A Low Phase Noise PLL Synthesizer with a Frequency Divider outside the Feedback Loop  [in Japanese]

    MIZUTANI Hiroyuki , HIGUCHI Kazuhide , TAJIMA Kenichi , HIEDA Morishige

    基準発振器、電圧制御発振器、可変分周器、位相周波数比較器、およびループフィルタから構成される基本的なPLLシンセサイザは、出力周波数の切り替えに用いる可変分周器がフィードバックループ上に接続されているため、位相周波数比較器の有する雑音が可変分周器の分周数に応じて上昇(劣化)し、PLLシンセサイザの出力信号に位相雑音として現れる。この位相周波数比較器に起因する雑音の上昇を抑制しPLLシンセサイザの位 …

    IEICE technical report. Microwaves 114(392), 95-98, 2015-01-08

    CiNii Fulltext PDF - Limited 

  • A Low Phase Noise PLL Synthesizer with a Frequency Divider outside the Feedback Loop  [in Japanese]

    MIZUTANI Hiroyuki , HIGUCHI Kazuhide , TAJIMA Kenichi , HIEDA Morishige

    基準発振器、電圧制御発振器、可変分周器、位相周波数比較器、およびループフィルタから構成される基本的なPLLシンセサイザは、出力周波数の切り替えに用いる可変分周器がフィードバックループ上に接続されているため、位相周波数比較器の有する雑音が可変分周器の分周数に応じて上昇(劣化)し、PLLシンセサイザの出力信号に位相雑音として現れる。この位相周波数比較器に起因する雑音の上昇を抑制しPLLシンセサイザの位 …

    IEICE technical report. Electron devices 114(391), 95-98, 2015-01-08

    CiNii Fulltext PDF - Limited 

  • 97-mW 8-Phase CMOS VCO and Dividers for a 134-GHz PLL Synthesizer

    MITSUNAKA Takeshi , IIZUKA Kunihiko , FUJISHIMA Minoru

    … In this paper, a 97-mW 8-phase CMOS voltage-controlled oscillator (VCO) and dividers covering the entire VCO oscillation range for a 134-GHz phase-locked loop (PLL) synthesizer are presented. … The dividers have two injection-locked frequency dividers (ILFDs), one with and one without an inductor, and a pulse-swallowing counter with a differential dual-modulus prescaler. …

    IEICE Trans. Electron. E98.C(7), 685-692, 2015

    J-STAGE CrossRef

  • Flying-Adder Frequency Synthesizer with a Novel Counter-Based Randomization Method

    CHEN Pao-Lung , LEE Da-Chen , LI Wei-Chia

    … This work presents a novel counter-based randomization method for use in a flying-adder frequency synthesizer with a cost-effective structure that can replace the fractional accumulator. … The output frequency had a range of 43.4 MHz ∼ 225.8 MHz at 1.8 V with peak-to-peak jitter (Pk-Pk) jitter 139.2 ps at 225.8 MHz. …

    IEICE Trans. Electron. E98.C(6), 480-488, 2015

    J-STAGE CrossRef

  • A High Stable Optical Frequency Synthesizer and its Application  [in Japanese]

    OKUBO Sho

    Journal of The Society of Instrument and Control Engineers 54(2), 121-128, 2015

    J-STAGE CrossRef

  • An Ultra-High Ramp Rate Arbitrary Waveform Generator for Communication and Radar Applications

    De-ping Zhang , Shao-yi Xie , Chao Wang , Wei-wei Wu , Chang Zhu , Nai-chang Yuan

    … Currently, the frequency ramp rate of most commercial direct digital synthesizer (DDS) chips is not more than several hundred MHz. … In some communication or radar applications, the frequency ramp rate must reach several GHz. … In order to greatly increase the frequency ramp rate, this paper proposes a full-custom multi-core & single-channel DDS (MCSC-DDS). …

    IEICE Electron. Express advpub(0), 2015

    J-STAGE CrossRef

  • An ultra-high ramp rate arbitrary waveform generator for communication and radar applications

    De-ping Zhang , Shao-yi Xie , Chao Wang , Wei-wei Wu , Chang Zhu , Nai-chang Yuan

    … Currently, the frequency ramp rate of most commercial direct digital synthesizer (DDS) chips is not more than several hundred MHz. … In some communication or radar applications, the frequency ramp rate must reach several GHz. … In order to greatly increase the frequency ramp rate, this paper proposes a full-custom multi-core & single-channel DDS (MCSC-DDS). …

    IEICE Electron. Express 12(3), 20141163-20141163, 2015

    J-STAGE CrossRef

  • A Monolithic Sub-sampling PLL based 6–18 GHz Frequency Synthesizer for C, X, Ku Band Communication

    ZHOU Hanchao , ZHU Ning , LI Wei , ZHOU Zibo , LI Ning , REN Junyan

    … A monolithic frequency synthesizer with wide tuning range, low phase noise and spurs was realized in 0.13 <I>μ</I>m CMOS technology. … It consists of an analog PLL, a harmonic-rejection mixer and injection-locked frequency doublers to cover the whole 6–18 GHz frequency range. … The synthesizer can achieve phase noise -113.7 dBc/Hz@100 kHz in the best case and the reference spur is below -60 dBc. …

    IEICE Trans. Electron. E98.C(1), 16-27, 2015

    J-STAGE CrossRef

  • Wide-Band Frequency Synthesizer and Ka-band Tunable Filter for Flexible Communications Payloads (Satellite Telecommunications)

    Moon Seong-mo , Kwak Changsoo , Uhm Manseok [他]

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 114(265), 71-76, 2014-10-23

  • C-2-5 A Wideband and Low Phase Noise PLL Synthesizer with a Frequency Divider Outside the Feedback Loop  [in Japanese]

    Mizutani Hiroyuki , Higuchi Kazuhide , Hieda Morishige

    Proceedings of the Society Conference of IEICE 2014年_エレクトロニクス(1), 28, 2014-09-09

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  • Femtosecond Optical Arbitrary Waveform Control Based on Ultrafast Optical Frequency Comb Synthesizer and Analyzer  [in Japanese]

    塩田 達俊

    レーザー研究 = The review of laser engineering : レーザー学会誌 42(9), 722-728, 2014-09

  • A Low Power, Area Efficient Frequency Calibration Technique with Shared Array Oscillator for Inductive-Coupling Transceiver  [in Japanese]

    Kitazawa Naoki , Jyo Teruo , Ishikuro Hiroki

    本論文ではインパルス磁界結合送受信機用の低消費電力,小面積の周波数キャリブレーション回路について述べる.パルス幅を制御するために,アレイ発振器で生成された多相クロックを用いる.また,PVTばらつきにより発振周波数が変化する問題を解決するために,発振周波数を制御する回路を提案する.この回路ではアレイ発振器で生成された多相クロックを用いる.パルスの発生と周波数の制御のための多相クロックを共有することで …

    Technical report of IEICE. ICD 114(175), 105-108, 2014-07-28

    CiNii Fulltext PDF - Subscription 

  • A Low Power, Area Efficient Frequency Calibration Technique with Shared Array Oscillator for Inductive-Coupling Transceiver  [in Japanese]

    Kitazawa Naoki , Jyo Teruo , Ishikuro Hiroki

    本論文ではインパルス磁界結合送受信機用の低消費電力,小面積の周波数キャリブレーション回路について述べる.パルス幅を制御するために,アレイ発振器で生成された多相クロックを用いる.また,PVTばらつきにより発振周波数が変化する問題を解決するために,発振周波数を制御する回路を提案する.この回路ではアレイ発振器で生成された多相クロックを用いる.パルスの発生と周波数の制御のための多相クロックを共有することで …

    Technical report of IEICE. SDM 114(174), 105-108, 2014-07-28

    CiNii Fulltext PDF - Subscription 

  • Current situations and issues of open-source high-quality speech synthesis system WORLD  [in Japanese]

    森勢 将雅

    … WORLD has the same structure of TANDEM-STRAIGHT, a Vodoer-based speech synthesis system, and it can decompose the input speech into the fundamental frequency (F0), spectral envelope and aperiodic information. … Since WORLD is open-source free software, developers can use it to develop their applications such as singing synthesizer. …

    研究報告音楽情報科学(MUS) 2014-MUS-103(69), 1-6, 2014-05-17

    IPSJ

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