検索結果 456件中 1-20 を表示

  • A 20-GHz Differential Push-Push VCO for 60-GHz Frequency Synthesizer toward 256 QAM Wireless Transmission in 65-nm CMOS

    WANG Yun , KATSURAGI Makihiko , OKADA Kenichi , MATSUZAWA Akira

    … <p>This paper present a 20-GHz differential push-push voltage controlled oscillator (VCO) for 60-GHz frequency synthesizer. …

    IEICE Transactions on Electronics E100.C(6), 568-575, 2017

    DOI

  • A 2.4 GHz fractional-N PLL with a low-power true single-phase clock prescaler

    Ji Xincun , Xia Xiaojuan , Wang Zixuan , Jin Leisheng

    … The measured synthesizer output frequency ranges from 2.16 to 2.7 GHz, and consumes 8 mW from a 1.3 V power supply. … The in-band phase noise is −98 dBc/Hz at 100 kHz offset, and −115 dBc/Hz at 1 MHz offset at a carrier frequency of 2.438 GHz. …

    IEICE Electronics Express 14(8), 20170065-20170065, 2017

    DOI

  • A 2.4 GHz fractional-N PLL with a low-power true single-phase clock prescaler

    Ji Xincun , Xia Xiaojuan , Wang Zixuan , Jin Leisheng

    … The measured synthesizer output frequency ranges from 2.16 to 2.7GHz, and consumes 8 mW from a 1.3 V power supply. … The in-band phase noise is -98 dBc/Hz at 100 kHz offset, and -115 dBc/Hz at 1 MHz offset at a carrier frequency of 2.438 GHz. …

    IEICE Electronics Express, 2017

    DOI

  • 特別講演 ファイバーレーザーの光コムを用いた超精密光波制御の応用展開 (ファイバレーザー技術)

    美濃島 薫

    レーザー学会研究会報告 = Reports on topical meeting of the Laser Society of Japan RTM16(29-33), 1-6, 2016-11-18

  • A 10-bit 6.8-GS/s Direct Digital Frequency Synthesizer Employing Complementary Dual-Phase Latch-Based Architecture

    MARTINEZ ALONSO Abdel , MIYAHARA Masaya , MATSUZAWA Akira

    … <p>This paper introduces a novel Direct Digital Frequency Synthesizer based on Complementary Dual-Phase Latch-Based sequencing method. … Compared to conventional Direct Digital Frequency Synthesizer using Flip-Flop as synchronizing element, the proposed architecture allows to double the data sampling rate while trading-off area and Power Efficiency. …

    IEICE Transactions on Electronics E99.C(10), 1200-1210, 2016

    DOI

  • Doppler Reflectometer System for Measuring Rotation Velocity of Fluctuation in GAMMA 10

    KOHAGURA Junko , TOKUZAWA Tokihiko , YOSHIKAWA Masayuki , NARITA Kohei , SAKAMOTO Mizuki , NAKASHIMA Yousuke

    … A frequency synthesizer is used in the range 11.5 - 18 GHz as the stable microwave source of X-mode probing beam for GAMMA 10 plasma having typical peak density ∼2 × 10<sup>18 </sup>m<sup>−3</sup>. …

    Plasma and Fusion Research 11(0), 2402022-2402022, 2016

    DOI

  • 発音時刻の直交性を考慮したNMFによるエレキベースの音高・発音時刻推定

    山本 清高 , 村田 晴美 , 荻原 昭夫 , 目加田 慶人

    … However, it is difficult to estimate them from the electric bass performance because of trade-off problem between time resolution and frequency resolution. … As a result of the experiments using MIDI synthesizer-generated sound of electric bass and real played electric bass sound, it is confirmed that the F-measure of the proposed method is higher than that of comparative method.</p> …

    電気学会論文誌. C 136(12), 1661-1667, 2016

    DOI

  • An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis

    LEE Pil-Ho , HWANG Yu-Jeong , LEE Han-Yeol , LEE Hyun-Bae , JANG Young-Chan

    … An on-chip monitoring circuit using a sub-sampling scheme, which consists of a 6-bit flash analog-to-digital converter (ADC) and a 51-phase phase-locked loop (PLL)-based frequency synthesizer, is proposed to analyze the signal integrity of a single-ended 8-Gb/s octal data rate (ODR) chip-to-chip interface with a source synchronous clocking scheme. …

    IEICE Transactions on Electronics E99.C(4), 440-443, 2016

    J-STAGE DOI

  • All-optically stabilized frequency comb

    Okubo Sho , Gunji Kenta , Onae Atsushi , Schramm Malte , Nakamura Keisuke , Hong Feng-Lei , Hattori Toshiaki , Hosaka Kazumoto , Inaba Hajime

    … The mode-locked fiber laser has two frequency-control actuators that are pump laser powers for erbium-doped and ytterbium-doped fibers. … We investigate the frequency-control characteristics of the mode-locked laser and find that the fixed points for the two actuators are sufficiently apart from each other, realizing the simultaneous phase locking of the repetition and carrier envelope offset frequencies. …

    Appl. Phys. Express 8(12), 122701, 2015-11-02

    応用物理学会

  • Novel phase-locking schemes for the carrier envelope offset frequency of an optical frequency comb

    Okubo Sho , Onae Atsushi , Hosaka Kazumoto , Sera Hideyuki , Inaba Hajime , Hong Feng-Lei

    … We propose simple schemes to phase-lock the carrier envelope offset frequency (f<inf>ceo</inf>) referring to the repetition rate (f<inf>rep</inf>) of an optical frequency comb. … is the averaging time of the frequency measurement. … These new locking schemes simplify the sign and mode-number determination in frequency measurements. …

    Appl. Phys. Express 8(11), 112402, 2015-10-15

    応用物理学会

  • Ultra-broadband dual-comb spectroscopy across 1.0–1.9 µm

    Okubo Sho , Iwakuni Kana , Inaba Hajime , Hosaka Kazumoto , Onae Atsushi , Sasada Hiroyuki , Hong Feng-Lei

    … We have carried out dual-comb spectroscopy and observed in a simultaneous acquisition a 140-THz-wide spectrum from 1.0 to 1.9 µm using two fiber-based frequency combs phase-locked to each other. …

    Appl. Phys. Express 8(8), 082402, 2015-07-15

    応用物理学会

  • 特別講演 Ultra-Low Phase Noise Frequency Synthesizer for up to 28Gbps 60GHz Wireless Transceivers (集積回路)

    ムサ アハマド , 岡田 健一 , 松澤 昭

    … Phase noise of the synthesizer used in transceivers has a significant impact on the achievable performance. … In this work, a 60GHz quadrature PLL frequency synthesizer for IEEE802.15.3c with wide tuning range and low phase noise is introduced. … The synthesizer is constructed using a 20GHz PLL that is coupled with a Quadrature Injection Locked Oscillator (QILO) as a frequency tripler to generate the 60GHz signal. …

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 114(499), 67-72, 2015-03-05

  • 特別講演 Ultra-Low Phase Noise Frequency Synthesizer for up to 28Gbps 60GHz Wireless Transceivers (マイクロ波)

    ムサ アハマド , 岡田 健一 , 松澤 昭

    … Phase noise of the synthesizer used in transceivers has a significant impact on the achievable performance. … In this work, a 60GHz quadrature PLL frequency synthesizer for IEEE802.15.3c with wide tuning range and low phase noise is introduced. … The synthesizer is constructed using a 20GHz PLL that is coupled with a Quadrature Injection Locked Oscillator (QILO) as a frequency tripler to generate the 60GHz signal. …

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 114(498), 67-72, 2015-03-05

  • フィードバックループの外部に可変分周器を接続した低位相雑音PLLシンセサイザ (マイクロ波)

    水谷 浩之 , 樋口 和英 , 田島 賢一 [他] , 檜枝 護重

    基準発振器、電圧制御発振器、可変分周器、位相周波数比較器、およびループフィルタから構成される基本的なPLLシンセサイザは、出力周波数の切り替えに用いる可変分周器がフィードバックループ上に接続されているため、位相周波数比較器の有する雑音が可変分周器の分周数に応じて上昇(劣化)し、PLLシンセサイザの出力信号に位相雑音として現れる。この位相周波数比較器に起因する雑音の上昇を抑制しPLLシンセサイザの位 …

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 114(392), 95-98, 2015-01-15

  • フィードバックループの外部に可変分周器を接続した低位相雑音PLLシンセサイザ (電子デバイス)

    水谷 浩之 , 樋口 和英 , 田島 賢一 [他] , 檜枝 護重

    基準発振器、電圧制御発振器、可変分周器、位相周波数比較器、およびループフィルタから構成される基本的なPLLシンセサイザは、出力周波数の切り替えに用いる可変分周器がフィードバックループ上に接続されているため、位相周波数比較器の有する雑音が可変分周器の分周数に応じて上昇(劣化)し、PLLシンセサイザの出力信号に位相雑音として現れる。この位相周波数比較器に起因する雑音の上昇を抑制しPLLシンセサイザの位 …

    電子情報通信学会技術研究報告 = IEICE technical report : 信学技報 114(391), 95-98, 2015-01-15

  • 97-mW 8-Phase CMOS VCO and Dividers for a 134-GHz PLL Synthesizer

    MITSUNAKA Takeshi , IIZUKA Kunihiko , FUJISHIMA Minoru

    … In this paper, a 97-mW 8-phase CMOS voltage-controlled oscillator (VCO) and dividers covering the entire VCO oscillation range for a 134-GHz phase-locked loop (PLL) synthesizer are presented. … The dividers have two injection-locked frequency dividers (ILFDs), one with and one without an inductor, and a pulse-swallowing counter with a differential dual-modulus prescaler. …

    IEICE Transactions on Electronics E98.C(7), 685-692, 2015

    J-STAGE DOI

  • Flying-Adder Frequency Synthesizer with a Novel Counter-Based Randomization Method

    CHEN Pao-Lung , LEE Da-Chen , LI Wei-Chia

    … This work presents a novel counter-based randomization method for use in a flying-adder frequency synthesizer with a cost-effective structure that can replace the fractional accumulator. … The output frequency had a range of 43.4 MHz ∼ 225.8 MHz at 1.8 V with peak-to-peak jitter (Pk-Pk) jitter 139.2 ps at 225.8 MHz. …

    IEICE Transactions on Electronics E98.C(6), 480-488, 2015

    J-STAGE DOI

  • 高安定光周波数シンセサイザーとその応用

    大久保 章

    計測と制御 54(2), 121-128, 2015

    J-STAGE DOI

  • An Ultra-High Ramp Rate Arbitrary Waveform Generator for Communication and Radar Applications

    De-ping Zhang , Shao-yi Xie , Chao Wang , Wei-wei Wu , Chang Zhu , Nai-chang Yuan

    … Currently, the frequency ramp rate of most commercial direct digital synthesizer (DDS) chips is not more than several hundred MHz. … In some communication or radar applications, the frequency ramp rate must reach several GHz. … In order to greatly increase the frequency ramp rate, this paper proposes a full-custom multi-core & single-channel DDS (MCSC-DDS). …

    IEICE Electronics Express advpub(0), 2015

    J-STAGE DOI

  • An ultra-high ramp rate arbitrary waveform generator for communication and radar applications

    De-ping Zhang , Shao-yi Xie , Chao Wang , Wei-wei Wu , Chang Zhu , Nai-chang Yuan

    … Currently, the frequency ramp rate of most commercial direct digital synthesizer (DDS) chips is not more than several hundred MHz. … In some communication or radar applications, the frequency ramp rate must reach several GHz. … In order to greatly increase the frequency ramp rate, this paper proposes a full-custom multi-core & single-channel DDS (MCSC-DDS). …

    IEICE Electronics Express 12(3), 20141163-20141163, 2015

    J-STAGE DOI

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