Search Results:　 1-20 of 76

1

Nanowire Metal--Oxide--Semiconductor Field-Effect Transistors with Small Subthreshold Swing Driven by Body-Bias Effect

Nishiguchi Katsuhiko , Fujiwara Akira

… A parasitic bipolar transistor formed in a fully depleted silicon-on-insulator MOSFET applies body bias to the MOSFET's channel and thus reduces the \mathit{SS}. …

Applied Physics Express 5(8), 085002-085002-3, 2012-08-25

The Japan Society of Applied Physics
2

High Voltage and High Reliability Silicon-on-Insulator Power IC Technologies and Their Application to 750 V 4.5 A Micro-Inverter IC

Shiraki Satoshi , Takahashi Shigeki , Yamada Akira , Yamamoto Masahiro , Senda Koji , Ashida Youichi , Hiruma Atsuyuki , Tokura Norihito

… We have successfully developed the record high blocking voltage of 750 V and the largest current capability of 4.5 A silicon-on-insulator (SOI) micro-inverter IC, which is made possible by the newly developed high voltage reliability technology and high-speed and low-dissipation extraction enhanced lateral insulated gate bipolar transistor (E2LIGBT). …

Jpn J Appl Phys 51(4), 04DP03-04DP03-4, 2012-04-25

The Japan Society of Applied Physics
3

Extraction Enhanced Lateral Insulated Gate Bipolar Transistor: A Super High Speed Lateral Insulated Gate Bipolar Transistor Superior to Lateral Dobule Difused Metal Oxide Semiconductor Field-Effect Transistor

Ashida Youichi , Takahashi Shigeki , Shiraki Satoshi , Tokura Norihito , Nakagawa Akio

… We have successfully developed novel extraction enhanced lateral insulated gate bipolar transistors (E2LIGBTs) in conventional silicon on insulator (SOI) wafers, which exhibit super-high speed switching of 34 ns turn-off time and a low on-state voltage of 3.7 V at 84 A/cm2 simultaneously with a high breakdown voltage of 738 V. …

Jpn J Appl Phys 51(4), 04DP02-04DP02-5, 2012-04-25

The Japan Society of Applied Physics
4

Design Optimization of Back-Gated Thin-Body Silicon-on-Insulator Capacitorless Dynamic Random Access Memory Cell

Cho Min Hee , Shin Changhwan , King Liu Tsu-Jae

… Highly scaled (22 nm-node) capacitorless single-transistor dynamic random access memory (DRAM) cell design is investigated via technology computer-aided design (TCAD) simulations. … It is found that the gate-sidewall spacer width and operating voltages can be adjusted to reduce band-to-band tunneling (BTBT) and thereby increase data retention time for bipolar junction transistor (BJT)-based operation. …

Jpn J Appl Phys 51(2), 02BD02-02BD02-6, 2012-02-25

The Japan Society of Applied Physics
5

Novel Theory for Operation of PNP and NPN Transistors : Explanation using Internal Photovoltaic Effect Model [in Japanese]

OKAMOTO Kensho

1948年,米国ベル研究所のショックレーは接合型トランジスタを発明し,その前年に点接触型トランジスタを発明した同研究所のバーディーン,ブラッテンとともに1956年度ノーベル物理学賞を受賞した。その後接合トランジスタは実用化され1970年頃からはIC化されて様々な電子機器や通信機器,コンピュータなどの情報処理装置で大量に使用されるようになり今日の情報化社会をもたらした。バイポーラ接合型トランジスタの …

Technical report of IEICE. OPE 111(358), 1-6, 2011-12-09

CiNii Fulltext PDF - Limited
6

A 0.25-μm Si-Ge Fully Integrated Pulse Transmitter with On-Chip Loop Antenna Array towards Beam-Formability for Millimeter-Wave Active Imaging

MAI KHANH Nguyen Ngoc , SASAKI Masahiro , ASADA Kunihiro

… We present a new idea for silicon-based mm-wave pulse beam-forming by using voltage-varied CMOS inverter chain. … Each of on-chip pulse generators employing under-damped/over-damped conditions to produce mm-wave pulses includes an R-L-C circuit, a bipolar junction transistor (BJT) operated as a switch and a CMOS inverter chain circuit for shaping the rising edge of the input clock. …

IEICE Transactions on Electronics 94(10), 1626-1633, 2011-10-01

J-STAGE CrossRef References (9)
7

Substrate Pick-Up Impacting on ESD Performances of Cascode NMOS Transistors

HUANG Shao-Chang , CHEN Ke-Horng

… For the TLP, detailed silicon data have been analyzed well in many parameters, such as the first triggering-on voltage (Vt1), the first triggering-on current (It1), the holding voltage (Vh), and the TLP I-V curve. … In order to explain the bipolar transistor turning-on mechanisms, two kinds of models have been proposed in this paper. …

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences 94(2), 688-695, 2011-02-01

J-STAGE CrossRef References (17)
8

A 1200V High-Power Driver IC with Multi-Chip Mounting for Strong HEVs [in Japanese]

SAKURAI Naoki , YURA Masashi , ISHII Toshiaki , HAKUTO Takuma , MORI Mutuhiro

… This IC consists of the 30V lower and upper arm ICs fabricated by Silicon On Insulator (SOI) process, 1200V discrete power MOSFETs for level shift circuit, and 30V discrete power MOSFETs for the output stage. … In addition, the soft and low loss switching was realized by combination of high power output stage and the soft gate circuits, which this power IC can drive an Insulated Gate Bipolar Transistor (IGBT) even for over 100kW class inverter. …

IEEJ Transactions on Electronics, Information and Systems 130(6), 955-960, 2010-06-01

J-STAGE CrossRef References (7)
9

Current Distribution Analysis of Insulated Gate Bipolar Transistor Cells

Hongyao Long , Mark R. Sweet , Luther-King Ngwendson , E. M. Sankara Narayanan

… In current insulated gate bipolar transistor (IGBT) technology, a corner or centered gate pad is employed with polycrystalline silicon (poly-Si) to form the metal oxide semiconductor (MOS) gate structure which forms a resistor–capacitor (RC) network across the die. …

Jpn J Appl Phys 49(4), 04DP14-04DP14-4, 2010-04-25

The Japan Society of Applied Physics
10

Fabrication of Novel Three-Step Drift-Doped Low-Temperature Polycrystalline Silicon Lateral Double-Diffusion Metal–Oxide–Semiconductor Using Excimer Laser Crystallization

Lin Jyh-Ling , Chen Huang-Jen , Chang Fang-Long , Cheng Huang-Chung

… Low-temperature polycrystalline silicon (poly-Si) thin-film transistor lateral double-diffusion metal–oxide–semiconductor field-effect transistors (LTPS TFT LDMOSFETs) and lateral insulated-gate bipolar transistors (LIGBTs) were fabricated by combining a thin-film transistor with a power structure, three-step drift doping, and excimer laser annealing. …

Jpn J Appl Phys 48(3), 031204-031204-5, 2009-03-25

The Japan Society of Applied Physics
11

Neutron-Transmutation-Doped Silicon for Power Electrical Devices : Worldwide Situation of Irradiation Reactor and Activity of Japan Atomic Energy Agency [in Japanese]

Yamamoto Kazuyoshi , Isshiki Masahiko , Komeda Masao , Sagawa Hisashi , Yamashita Kiyonobu

… This review is described a history and a basis of Neutron-Transmutation-Doped Silicon (NTD-Si), which has an advantage of homogeneous doping in the silicon crystal. … Today, the market of NTD-Si is growing, because the market of the Insulated Gate Bipolar Transistor (IGBT) as an important device to realize energy-saving society is widespread. …

IEICE technical report. Electron devices 108(262), 45-50, 2008-10-16

CiNii Fulltext PDF - Subscription References (14)
12

Emitter Scaling Dependence of Mixed-Mode Reliability Degradation in Silicon–Germanium Heterojunction Bipolar Transistors

Lee Seung-Yun , Zhu Chendong , Cressler John D. , Lee Sang-Heung

… The variation of mixed-mode reliability degradation with emitter scaling in silicon–germanium heterojunction bipolar transistors was investigated. …

Jpn J Appl Phys 47(7), 5309-5313, 2008-07-25

The Japan Society of Applied Physics
13

A New Silicon-on-Insulator Lateral Insulated Gate Bipolar Transistor and Lateral Diode Employing the Separated Schottky Anode for a Power Integrated Circuit

Ji In-Hwan , Choi Young-Hwan , Ha Min-Woo , Han Min-Koo

… A new silicon-on-insulator (SOI) lateral insulated gate bipolar transistor (LIGBT) and lateral diode employing the separated Schottky anode (SSCA) is proposed and verified by the two dimensional numerical simulation based on experimental results. …

Jpn J Appl Phys 46(4B), 2041-2045, 2007-04-30

The Japan Society of Applied Physics
14

Geometry Effect on SiGe Heterojunction Bipolar Transistor Unit Cell for 1 W High-Efficiency RF Power Amplifier Applications

Chiou Hwann-Kaeo , Yeh Ping-Chun , Lee Chwan-Ying , Yeh John , Tang Denny , Chern John

… The effect of geometry on the RF power performance of silicon–germanium heterojunction bipolar transistor (SiGe HBT) unit cells is investigated using various emitter finger spacing ($S$). …

Jpn J Appl Phys 46(3A), 917-925, 2007-03-15

The Japan Society of Applied Physics References (26)
15

Single-transistor-cell type ferroelectric memories using metal/ferroelectric/insulator/semiconductor structures [in Japanese]

AIZAWA Koji , TAKAHASHI Kazuhiro , PARK Byung-Eun , ISHIWARA Hiroshi

本研究では、トランジスタ型強誘電体メモリ用のメモリセルとしてPt/SrBi_2Ta_2O_9(SBT)/HfO_2/SiおよびPt/(Bi, La)_4Ti_3O_<12>(BLT)/HfO_2/Si(金属/強誘電体/絶縁体/半導体 : MFIS)構造のpチャネル電界効果トランジスタ(MFIS FET)を作製し、その電気的特性評価を行った。強誘電体には厚さ400nmのゾルゲルSBTおよ …

Technical report of IEICE. SDM 104(713), 49-52, 2005-03-04

CiNii Fulltext PDF - Subscription References (15)
16

Performance limits of silicon power devices [in Japanese]

MAJUMDAR Gourab

應用物理 74(1), 65-70, 2005-01-10

References (11)
17

A Low-Power Silicon-on-Insulator Photodetector with a Nanometer-Scale Wire for Highly Integrated Circuit

Choi Hong Goo , Choi Yeon-Shik , Jo Young Chang , Kim Hoon

… A highly sensitive photodetector, which is fabricated on a silicon-on-insulator metal oxide semiconductor field-effect transistor (SOI MOSFET) with a nanometer-scale wire, is proposed and optical responses are studied. … We consider that these phenomena are affected by the wire, and the physical mechanism of the operation of our photodetector is explained by a strong lateral bipolar action. …

Jpn J Appl Phys 43(6B), 3916-3918, 2004-06-15

The Japan Society of Applied Physics References (7)
18

CMOS Application of Schottky Source/Drain SOI MOSFET with Shallow Doped Extension

Matsumoto Sumie , Nishisaka Mika , Asano Tanemasa

… The silicon-on-insulator metal-oxide-semiconductor field-effect transistor (SOI MOSFET) whose source/drain is composed of Schottky contacts and a shallow-doped extension is investigated. … The effect of Schottky contacts on the floating body effect (FBE) is investigated by analyzing the lateral bipolar characteristics of these devices. …

Jpn J Appl Phys 43(4B), 2170-2175, 2004-04-15

The Japan Society of Applied Physics References (7)
19

Schottky Source/Drain SOI MOSFET with Shallow Doped Extension

Nishisaka Mika , Matsumoto Sumie , Asano Tanemasa

… Silicon-on-insulator metal-oxide-semiconductor field-effect-transistor (SOI MOSFET) whose source and drain are composed of deep Schottky contact and shallow-doped extension is investigated. … The body current in MOSFET operation and tests in lateral bipolar operation show that the proposed source/drain structure is effective in reducing the floating body effect and therefore suppressing the early drain breakdown of the SOI MOSFET. …

Jpn J Appl Phys 42(4B), 2009-2013, 2003-04-15

The Japan Society of Applied Physics References (9)
20

Hot-Carrier-Induced Degradation on 0.1 μm Partially Depleted Silicon-On-Insulator Complementary Metal-Oxide-Semiconductor Field-Effect-Transistor

Yeh Wen-Kuan , Wang Wen-Han , Fang Yean-Kuen , Yang Fu-Liang

… Hot-carrier-induced degradation of partially depleted silicon-on-insulator (SOI) complementary metal-oxide-semiconductor field-effect-transistors (CMOSFET)s at various applied voltages and temperatures was investigated with respect to 0.1 μm body-contact (BC-SOI) and floating-body (FB-SOI) devices with 2 nm gate oxide. … In the FB-SOI nMOSFET, both the floating body effect (FBE) and the parasitic bipolar transistor effect (PBT) affect the hot-carrier-induced degradation of device characteristics. …

Jpn J Appl Phys 42(4B), 1993-1998, 2003-04-15

The Japan Society of Applied Physics

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Search Results:　 1-20 of 76