Suppression of Surge Voltage in MOS-FET DC-RF Inverter Operating in the Order of MHz.

• Suzuki Taiju

  Shizuoka University

• Ikeda Hiroaki

  Shizuoka University

Bibliographic Information

Other Title

• ＭＯＳ‐ＦＥＴ式メガヘルツ帯インバータにおけるサージ電圧抑制の一検討
• MOS-FETシキ メガヘルツタイ インバータ ニ オケル サージ デンアツ

Abstract

When a megasonic transducer having a low impedance of one ohm or so is connected as a load to the inverter operating in the order of MHz, a snubber circuit is generally used to suppress the surge voltages generated across the switching device.<br>This paper analyzes the surge voltage generation and suppression for the single-ended MOS-FET DC-RF inverter feeding an RF power of up to 1kW to the resistive and resonating loads, respectively. A switched snubber of high speed type consisting of an Nchannel MOS-FET and a capacitor is proposed for suppressing surge voltages. Loss power due to the charging and discharging currents flowing through the capacitor in the switched snubber is analyzed and numerically verified. Based on the analysis carried out for the resistive inverter load, the mechanisms of the surge voltage generation and suppression are analyzed for the resonating inverter load. When a megasonic transducer is used as a resonating load, the surge voltage suppression is also described.

Journal

• IEEJ Transactions on Industry Applications

  IEEJ Transactions on Industry Applications 117 (2), 172-181, 1997

  The Institute of Electrical Engineers of Japan

Keywords

• MOS-FET

Details

• CRID: 1390282679631150080
• NII Article ID: 10002723858
• NII Book ID: AN10012320
• DOI: 10.1541/ieejias.117.172
• ISSN: 13488163
• ISSN: 09136339
• NDL BIB ID: 4128706
• Web Site: https://ndlsearch.ndl.go.jp/books/R000000004-I4128706
• Web Site: http://www.jstage.jst.go.jp/article/ieejias1987/117/2/117_2_172/_pdf
• Text Lang: ja
• Data Source:
  • JaLC
  • NDL
  • Crossref
  • CiNii Articles
• Abstract License Flag: Disallowed