並列LU分解を用いる系統過渡安定度計算に適したマルチプロセッサアーキテクチャ

• 山本 將人

  東京電力

• 中田 登志之

  日本電気

• 栗田 養逸

  日本電気

書誌事項

タイトル別名

• A Multiprocessor System Architecture Suited for Power System Transient Calculation
• ヘイレツ LU ブンカイ オ モチイル ケイトウ カト アンテイド ケイサン

抄録

In the field of power system calculation, much study has been made in the area of applying parallel computers in order to increase computation speed. However, unlike examples in other application areas, such as circuit simulation or computational fluid dynamics, the performance gain is small. Also, the performance gain begins to saturate just after small number of processors are utilized. This is due to the essential feature of power system calculation: mainly (1) The size of the problem is usually much smaller than the other application fields. (2) The sparsity of the problem is high. These two features results in the fact that effect of interprocessor communication overhead is severely reflected.<br>In this study, the authors tried to determine the most suitable parallel architecture for Power System Calculation, restricting the number of processors to 16 or so. The architectural feature we wanted to detemine are Memory architecture and Inter processor connection method. The candidates we chose were (a) Distributed memory architecture connected by an inter-processor communication network, (b) Distributed memory architecture connected by a bus, (c) Shared memory architecture connected by a bus, and (d) Composite distributed/shared memory architecture connected by a bus. We evaluated each architecture using the data for transient stability analysis from a single PE excution, and evaluating each memory operation, necessary interprocessor communication and computation. The results showed that while it was very hard to attain much speed up using a distributed shard memory architecture connected by an interconnection network, it was possible to attain a speedup of 6.5 using 16 PEs on a Composite distributed/shared memory architecture connected by a bus.

収録刊行物

• 電気学会論文誌Ｃ（電子・情報・システム部門誌）

  電気学会論文誌Ｃ（電子・情報・システム部門誌） 117 (12), 1740-1748, 1997

  一般社団法人 電気学会

キーワード

• 並列計算機
• アーキテクチャ
• 分散メモリー
• 共有メモリー
• 電力系統計算
• 過渡安定度計算

詳細情報

• CRID: 1390001204607696896
• NII論文ID: 130006843596
• NII論文ID: 10011965139
• NII論文ID: 10002812366
• NII書誌ID: AN10065950
• DOI: 10.1541/ieejeiss1987.117.12_1740
• ISSN: 13488155
• ISSN: 03854221
• NDL書誌ID: 4353407
• Web Site: https://ndlsearch.ndl.go.jp/books/R000000004-I4353407
• Web Site: https://www.jstage.jst.go.jp/article/ieejeiss1987/117/12/117_12_1740/_pdf
• データソース種別:
  • JaLC
  • NDL
  • Crossref
  • CiNii Articles
• 抄録ライセンスフラグ: 使用不可