低地球軌道用放電抑制型高電圧太陽電池アレイの基礎開発実験

• 趙 孟佑

  九州工業大学

• 白石 康

  九州工業大学

• 豊田 和弘

  九州工業大学

• 匹田 政幸

  九州工業大学

書誌事項

タイトル別名

• Basic Developmental Experiment of Arc-Resistive High VoltageSolar Array for Low Earth Orbit
• テイ チキュウ キドウヨウ ホウデン ヨクセイガタ コウデンアツ タイヨウ デンチ アレイ ノ キソ カイハツ ジッケン

抄録

When a solar array in Low Earth Orbit has a high voltage of 100V or higher, an arc occurs. It causes surface degradation, electromagnetic interference and other undesired side-effects. Considering a large space platform of 1MW power in future, solar array which can operate at a voltage of 300V or higher is required. We report the results of experiments where we test the following three mitigation techniques to suppress the arcing; (1) Because an arcing is due to the charging of the coverglass by positive ions, we place PET (polyethyleneterephthalate) film in front of the coverglass to physically prevent the charging by ions. (2) We place conductive wire in front of the interconnector to narrow the plasma sheath region around the interconnector. (3) We use conductive ITO (Indium Tin Oxide) coating coverglass to reducing the charging on coverglass. The effect of each mitigation method is compared based on the tests in a vacuum chamber which simulates the plasma conditions in Low Earth Orbit.

収録刊行物

• 日本航空宇宙学会論文集

  日本航空宇宙学会論文集 50 (581), 215-215, 2002

  一般社団法人 日本航空宇宙学会

キーワード

• Solar Array, Arc
• Space Plasma
• Triple Junction

詳細情報

• CRID: 1390282679447361792
• NII論文ID: 10008840329
• NII書誌ID: AA11307372
• DOI: 10.2322/jjsass.50.215
• ISSN: 24323691
• ISSN: 13446460
• NDL書誌ID: 6185060
• Web Site: https://ndlsearch.ndl.go.jp/books/R000000004-I6185060
• Web Site: https://www.jstage.jst.go.jp/article/jjsass/50/581/50_581_215/_pdf
• 本文言語コード: ja
• データソース種別:
  • JaLC
  • NDL
  • Crossref
  • CiNii Articles
• 抄録ライセンスフラグ: 使用不可