Allocation and Circuit Parameter Design of Superconducting Fault Current Limiters in Loop Power System by a Genetic Algorithm

• Komsan Komsan

  Graduate School of Engineering, Osaka University

• Furusawa Ken

  Graduate School of Engineering, Osaka University

• Mitani Yasunori

  Graduate School of Engineering, Osaka University

• Tsuji Kiichiro

  Graduate School of Engineering, Osaka University

抄録

In near future, many Independent Power Producers (IPPs) will participate in power generations according to their own strategic contracts by the deregulation. Loop or mesh systems can be designed to balance the power flow and to regulate the voltage resulting to the flexibility of power system operation, improvement of reliability and economical efficiency. Nevertheless, they bring to the problem of increased fault levels which may raise beyond the withstand capability of existing circuit breakers in the power systems. Short-circuit current is strongly related to the cost of apparatus and the effective use of power transmissions. Therefore, the introduction of Superconducting Fault Current Limiters (SFCLs) becomes an effective way for suppressing such a large short-circuit current. In this paper, first the authors evaluate the behavior of the S/N transition-type SFCL by considering the sub-transient and transient effects of generators in order to obtain smaller SFCL circuit parameters, i.e.\ the resistance of the superconducting coil and the reactance of the current-limiting inductor. Then the authors propose a method by using a hierarchical genetic algorithm (HGA) combined with a micro-genetic algorithm (micro-GA) to search for the optimal locations and the smallest SFCL circuit parameters simultaneously. The flexibility in defining the required objective function by using the proposed method makes it possible to evaluate the requirement of SFCLs in large power systems. Analysis by computer simulation has been carried out in an example loop power system.

収録刊行物

• 電気学会論文誌Ｂ（電力・エネルギー部門誌）

  電気学会論文誌Ｂ（電力・エネルギー部門誌） 123 (9), 1054-1063, 2003

  一般社団法人 電気学会

キーワード

• genetic algorithm
• hierarchical genetic algorithm (HGA)
• loop power system
• micro-genetic algorithm (micro-GA)
• superconducting fault current limiter (SFCL)

詳細情報

• CRID: 1390282679577521792
• NII論文ID: 10011750590
• NII書誌ID: AN10136334
• DOI: 10.1541/ieejpes.123.1054
• ISSN: 13488147
• ISSN: 03854213
• NDL書誌ID: 6691921
• Web Site: https://ndlsearch.ndl.go.jp/books/R000000004-I6691921
• Web Site: https://www.jstage.jst.go.jp/article/ieejpes/123/9/123_9_1054/_pdf
• 本文言語コード: en
• データソース種別:
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