Fabricated on a GaAs-based Semiconductor-on-Insulator Substrate Using a Spin-On Low-$k$ Dielectric Film

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著者

    • Sato Kuninori
    • Department of Quantum Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603, Japan
    • Ohno Yutaka
    • Department of Quantum Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603, Japan
    • Kishimoto Shigeru
    • Department of Quantum Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603, Japan
    • Maezawa Koichi
    • Department of Quantum Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603, Japan
    • Mizutani Takashi
    • Department of Quantum Engineering, Nagoya University, Furo-cho, Chikusa-ku, Nagoya 464-8603, Japan

抄録

We proposed and successfully fabricated a GaAs-based semiconductor-on-insulator (SOI) metal–semiconductor-filed-effect-transistor (MESFET) using a low-temperature wafer-bonding technique with a spin-on low-$k$ dielectric film, FO$x$, as a bonding layer. In this structure, the channel is isolated from the semi-insulating (SI) GaAs substrate by a FO$x$ layer. The fabricated 1-μm-gate-length SOI MESFETs showed good pinch-off and saturation characteristics. One of the most important improvements expected for this structure is a reduction of the drain-source capacitance, $C_{\text{DS}}$, which dominates the microwave switching property (on/off ratio). It was demonstrated that the $C_{\text{DS}}$ of the SOI MESFET is much smaller than that of the conventional GaAs MESFET. It was also confirmed that the drain current of the SOI MESFET is negligibly affected by the side-gate voltage.

収録刊行物

  • Japanese journal of applied physics. Pt. 1, Regular papers & short notes

    Japanese journal of applied physics. Pt. 1, Regular papers & short notes 42(11), 6839-6840, 2003-11-15

    公益社団法人 応用物理学会

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各種コード

  • NII論文ID(NAID)
    10012563890
  • NII書誌ID(NCID)
    AA10457675
  • 本文言語コード
    EN
  • 資料種別
    SHO
  • ISSN
    0021-4922
  • データ提供元
    CJP書誌  J-STAGE  JSAP 
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