A 1.9-μm^2 Loadless CMOS Four-Transistor SRAM Cell in a 0.18-μm Logic Technology

• NODA K.

Journal

• IEEE Tech. Dig. Int. Electron Device Meeting, 1998

  IEEE Tech. Dig. Int. Electron Device Meeting, 1998 643-646, 1998

Details

• CRID: 1571135650047924736
• NII Article ID: 10013531882
• Data Source:
  • CiNii Articles