Low Dynamic Power and High Speed 90-nm CMOS Clock Networks

• HAGIWARA Yousuke

  Graduate School of Science and Engineering, Chuo University

• NAGAYAMA Suguru

  Graduate School of Science and Engineering, Chuo University

• KOBAYASHI Nobuaki

  Graduate School of Science and Engineering, Chuo University

• ENOMOTO Tadayoshi

  Graduate School of Science and Engineering, Chuo University

Bibliographic Information

Other Title

• 低消費電力・高速90mm-CMOSクロックドライバ

Journal

• 電子情報通信学会技術研究報告. SDM, シリコン材料・デバイス

  電子情報通信学会技術研究報告. SDM, シリコン材料・デバイス 106 (206), 87-92, 2006-08-10

Keywords

• clock driver
• register
• CMOS
• active power
• delay-time

Details

• CRID: 1573950400120826752
• NII Article ID: 10018233896
• NII Book ID: AN10013254
• Text Lang: ja
• Data Source:
  • CiNii Articles