# Characterization of High-Performance Polycrystalline Silicon Complementary Metal–Oxide–Semiconductor Circuits

## 抄録

Polycrystalline silicon (poly-Si) complementary metal–oxide–semiconductor (CMOS) circuits have been fabricated by using an advanced excimer-laser annealing method and a plasma-oxidation method. The 1-μm-long thin-film transistors (TFTs) were fabricated on arrays of laterally grown long and narrow grains, so that the majority of carriers were free from scattering at grain boundaries during propagation through the channel. The propagation delay time measured by a 21-stage ring oscillator was 175 ps and a power-delay product of $9\times 10^{-13}$ J/gate was obtained at a supply voltage of 3.3 V. The obtained propagation delay time was almost the same as those of bulk Si devices having the same gate length. Furthermore, we expect that 1-μm-long CMOS TFT circuits on glass will have a performance superior to that of 1-μm-long bulk Si devices when the short channel effect and threshold voltage fluctuation are controlled well.

## 収録刊行物

• Japanese journal of applied physics. Pt. 1, Regular papers & short notes

Japanese journal of applied physics. Pt. 1, Regular papers & short notes 46(1), 51-55, 2007-01-15

Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physics

## 各種コード

• NII論文ID(NAID)
10018704212
• NII書誌ID(NCID)
AA10457675
• 本文言語コード
EN
• 資料種別
ART
• 雑誌種別
大学紀要
• ISSN
0021-4922
• NDL 記事登録ID
8605620
• NDL 雑誌分類
ZM35(科学技術--物理学)
• NDL 請求記号
Z53-A375
• データ提供元
CJP書誌  NDL  JSAP

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