Integration Process of Impact-Ionization Metal–Oxide–Semiconductor Devices with Tunneling Field-Effect-Transistors and Metal–Oxide–Semiconductor Field-Effect Transistors

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著者

    • Choi Woo Young Choi Woo Young
    • Inter-University Semiconductor Research Center, Seoul National University, San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Korea
    • Lee Jong Duk Lee Jong Duk
    • Inter-University Semiconductor Research Center, Seoul National University, San 56-1, Sillim-dong, Gwanak-gu, Seoul 151-742, Korea

抄録

This paper presents the integration process of impact-ionization metal–oxide–semiconductor (I-MOS) devices, tunneling field-effect transistors (TFETs), and metal–oxide–semiconductor field-effect transistors (MOSFETs). Based on it, 70-nm I-MOS devices, TFETs, and fully depleted silicon-on-insulator (FD-SOI) MOSFETs were successfully fabricated. However, due to lack of photomasks, MOSFETs were made on separate wafers in this work. I-MOS devices have a small subthreshold swing value of 7.3 mV/dec. Although TFETs also show a normal transistor operation, there is still much room for improvement in current drivability and subthreshold swing value. The transfer characteristics of MOSFETs are similar to those of SOI MOSFETs in literatures. The integration process shows a feasibility to implement various functionalities on one chip.

収録刊行物

  • Japanese journal of applied physics. Pt. 1, Regular papers & short notes  

    Japanese journal of applied physics. Pt. 1, Regular papers & short notes 46(1), 122-124, 2007-01-15 

    Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physics

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キーワード

各種コード

  • NII論文ID(NAID)
    10018704436
  • NII書誌ID(NCID)
    AA10457675
  • 本文言語コード
    EN
  • 資料種別
    SHO
  • 雑誌種別
    大学紀要
  • ISSN
    0021-4922
  • NDL 記事登録ID
    8605965
  • NDL 雑誌分類
    ZM35(科学技術--物理学)
  • NDL 請求記号
    Z53-A375
  • データ提供元
    CJP書誌  NDL  JSAP 
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