A Robust Embedded Ladder-Oxide/Cu Multilevel Interconnect Technology for 0.13 μm Complementary Metal Oxide Semiconductor Generation

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著者

    • Shiba Kazutoshi
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Kunishima Hiroyuki
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Hironaga Nobuo
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Honma Ichiro
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Nanba Hiroaki
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Yokogawa Shinji
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Kameyama Akiko
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Goto Takayuki
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Usami Tatsuya
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Ohto Koichi
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Kubo Akira
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Suzuki Mieko
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Yamamoto Yoshiaki
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Watanabe Susumu
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Yamada Kenta
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Ikeda Masahiro
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Ueno Kazuyoshi
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan
    • Horiuchi Tadahiko
    • NEC Electronics Corporation, 1120, Shimokuzawa, Sagamihara, Kanagawa 229-1198, Japan

抄録

A robust embedded ladder-oxide ($k=2.9$)/copper (Cu) multilevel interconnect is demonstrated for 0.13 μm complementary metal oxide semiconductor (CMOS) generation. A stable ladder-oxide intermetal dielectric (IMD) is integrated by the Cu metallization with a minimum wiring pitch of 0.34 μm, and a single damascene (S/D) Cu-plug structure is applied. An 18% reduction in wiring capacitance is obtained compared with that in SiO2 IMDs. The superior controllability of metal thickness by the S/D process enables us to enhance the MPU maximum frequency easily. The stress-migration lifetime of vias on wide metals for the S/D Cu-plug structure is longer than that for a dual damascene (D/D) structure. Reliability test results such as electromigration (EM), the temperature dependant dielectric breakdown (TDDB) of Cu interconnects, and pressure cooker test (PCT) results are acceptable. Moreover, a high flexibility in a thermal design is obtained.

収録刊行物

  • Japanese journal of applied physics. Pt. 1, Regular papers & short notes

    Japanese journal of applied physics. Pt. 1, Regular papers & short notes 46(3A), 954-961, 2007-03-15

    Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physics

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各種コード

  • NII論文ID(NAID)
    10018866719
  • NII書誌ID(NCID)
    AA10457675
  • 本文言語コード
    EN
  • 資料種別
    ART
  • 雑誌種別
    大学紀要
  • ISSN
    0021-4922
  • NDL 記事登録ID
    8687941
  • NDL 雑誌分類
    ZM35(科学技術--物理学)
  • NDL 請求記号
    Z53-A375
  • データ提供元
    CJP書誌  NDL  JSAP 
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