A Synthesis of Rail-to-Rail CMOS Multiplier Based on Class-B Squaring Circuit for Low Power Applications

• MAKINO Daisuke

  Faculty of Science and Technology, Tokyo University of Science

• HYOGO Akira

  Faculty of Science and Technology, Tokyo University of Science

• SEKINE Keitaro

  Faculty of Science and Technology, Tokyo University of Science

Bibliographic Information

Other Title

• B級動作2乗回路を用いた乗算器の一構成

Journal

• 電気学会研究会資料. ECT, 電子回路研究会

  電気学会研究会資料. ECT, 電子回路研究会 2001 (87), 41-46, 2001-12-10

Keywords

• class-B
• squaring circuit
• multiplier
• Rail-to-Rail
• low power consumption

Details

• CRID: 1573105975190163456
• NII Article ID: 10018970856
• NII Book ID: AN10441815
• Text Lang: ja
• Data Source:
  • CiNii Articles