InP HEMTを用いた43-Gbit/s完全モノリシック集積クロック・データ再生回路  [in Japanese] A Fully Monolithic Integrated 43-Gbit/s Clock and Data Recovery Circuit in InP HEMT Technology  [in Japanese]

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Author(s)

Journal

  • 電気学会研究会資料. EDD, 電子デバイス研究会  

    電気学会研究会資料. EDD, 電子デバイス研究会 2002(46), 31-35, 2002-03-07 

References:  10

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Cited by:  1

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Codes

  • NII Article ID (NAID)
    10018990516
  • NII NACSIS-CAT ID (NCID)
    AN1044178X
  • Text Lang
    JPN
  • Article Type
    Journal Article
  • Data Source
    CJP  CJPref 
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