ナノメータMOSFETにおける容量パラメータの直接測定 [in Japanese] Direct Measurement of Capacitance Parameters in Nanometer-Scale MOSFETs [in Japanese]
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A simple measurement method is proposed for extracting capacitances in nanometer-scale metal-oxide-semiconductor field-effect transistors (MOSFETs). The method utilizes two serially connected MOSFETs and an optional metal layer above the intermediate node between MOSFETs. Gate-drain overlap capacitance and capacitances around the intermediate node, including one related to the metal layer, can be obtained by measuring the transfer current when two MOSFETs are alternately turned on at high frequency. High sensitivity in the order of attofarad is demonstrated using silicon-on-insulator (SOI) MOSFETs with gate length of 140∼300 nm and channel width of 320 nm. The proposed method is useful not only in optimizing the high-frequency performance of the scale-down devices, but also in estimating the instability (i.e. <i>kT</i>/<i>C</i> noise) and single-electron charging effect in nanometer-scale circuits.
- IEEJ Transactions on Electronics, Information and Systems
IEEJ Transactions on Electronics, Information and Systems 128(6), 905-911, 2008-06-01
The Institute of Electrical Engineers of Japan