PWM Converter Power Density Barriers

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Power density of power electronic converters has roughly doubled every 10 years since 1970. Behind this trajectory is the continuous advancement of power semiconductor devices, which has increased the converter switching frequencies by a factor of 10 every decade. However, today's cooling concepts and passive components are major barriers for a continuation of this trend. To identify such technological barriers, this paper investigates the volume of the cooling system and passive components as a function of the switching frequency for power electronic converters and determines the switching frequency that minimizes the total volume. A power density limit of 28kW/dm<sup>3</sup> at 300kHz is calculated for an isolated DC-DC converter, 44kW/dm<sup>3</sup> at 820kHz for a three-phase unity power factor PWM rectifier, and 26kW/dm<sup>3</sup> at 21kHz for a sparse matrix converter. For single-phase AC-DC conversion a general limit of 35kW/dm<sup>3</sup> results from the DC link capacitor. These power density limits highlight the need to broaden the scope of power electronics research to include cooling systems, high frequency electromagnetics, interconnection and packaging technology, and multi-domain modelling and simulation to ensure further advancement along the power density trajectory.

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  • 電気学会論文誌. D, 産業応用部門誌 = The transactions of the Institute of Electrical Engineers of Japan. D, A publication of Industry Applications Society  

    電気学会論文誌. D, 産業応用部門誌 = The transactions of the Institute of Electrical Engineers of Japan. D, A publication of Industry Applications Society 128(4), 468-480, 2008-04-01 

    The Institute of Electrical Engineers of Japan

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各種コード

  • NII論文ID(NAID)
    10021133973
  • NII書誌ID(NCID)
    AN10012320
  • 本文言語コード
    ENG
  • 資料種別
    ART
  • ISSN
    09136339
  • NDL 記事登録ID
    9453812
  • NDL 雑誌分類
    ZN31(科学技術--電気工学・電気機械工業)
  • NDL 請求記号
    Z16-1608
  • データ提供元
    CJP書誌  CJP引用  NDL  J-STAGE 
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