Voltage and Level-Shifter Assignment Driven Floorplanning

• YU Bei

  EDA lab, Department of Computer Science and Technology, Tsinghua University

• DONG Sheqin

  EDA lab, Department of Computer Science and Technology, Tsinghua University

• CHEN Song

  Graduate School of Information, Production and Systems, Waseda University

• GOTO Satoshi

  Graduate School of Information, Production and Systems, Waseda University

抄録

Low Power Design has become a significant requirement when the CMOS technology entered the nanometer era. Multiple-Supply Voltage (MSV) is a popular and effective method for both dynamic and static power reduction while maintaining performance. Level shifters may cause area and Interconnect Length Overhead (ILO), and should be considered at both floorplanning and post-floorplanning stages. In this paper, we propose a two phases algorithm framework, called VLSAF, to solve voltage and level shifter assignment problem. At floorplanning phase, we use a convex cost network flow algorithm to assign voltage and a minimum cost flow algorithm to handle level-shifter assignment. At post-floorplanning phase, a heuristic method is adopted to redistribute white spaces and calculate the positions and shapes of level shifters. The experimental results show VLSAF is effective.

収録刊行物

• IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

  IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences E92-A (12), 2990-2997, 2009

  一般社団法人 電子情報通信学会

キーワード

• voltage-island
• voltage assignment
• convex network flow
• level shifter assignment
• white space redistribution

詳細情報

• CRID: 1390001206311667712
• NII論文ID: 10026861275
• NII書誌ID: AA10826239
• DOI: 10.1587/transfun.e92.a.2990
• ISSN: 17451337
• ISSN: 09168508
• Web Site: http://www.jstage.jst.go.jp/article/transfun/E92.A/12/E92.A_12_2990/_pdf
• 本文言語コード: en
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