Effect of Arrangement of Input Gates on Logic Switching Characteristics of Nanodot Array Device

• JO Mingu

  Graduate School of Information Science and Technology, Hokkaido University

• KATO Yuki

  Graduate School of Information Science and Technology, Hokkaido University

• ARITA Masashi

  Graduate School of Information Science and Technology, Hokkaido University

• ONO Yukinori

  NTT Basic Research Laboratories, NTT Corporation

• FUJIWARA Akira

  NTT Basic Research Laboratories, NTT Corporation

• INOKAWA Hiroshi

  Research Institute of Electronics, Shizuoka University

• TAKAHASHI Yasuo

  Graduate School of Information Science and Technology, Hokkaido University

• CHOI Jung-Bum

  Physics and Research Institute of NanoScience and Technology, Chungbuk National University

抄録

We developed a flexible-logic-gate single-electron device (SED) in which logic functions can be selected by changing the voltage applied to the control gate. It consists of an array of nanodots with multiple inputs and multiple outputs. Since the gate electrodes couple capacitively to the many dots underneath, complicated characteristics depending on the combination of the gate voltages yield a selectable logic gate when some of the gate electrodes are used as control gates. One of the important issues is how to design the arrangement of nanodots and gate electrodes. In this study, we fabricated a Si nanodot array with two simple input gates and two output terminals, in which each gate was coupled to half of the nanodot array. Even though the device had a very simple input-gate arrangement and just one control gate, we could create a half-adder function through the use of current maps as functions of the input gate voltages. We found that the nanodots evenly coupled capacitively to both input gates played an important role in getting a basic set of logic functions. Moreover, these results guarantee that a more complicated input-gate structure, in which each gate evenly couples many nanodots, will yield more complicated functions.

収録刊行物

• IEICE Transactions on Electronics

  IEICE Transactions on Electronics E95.C (5), 865-870, 2012

  一般社団法人 電子情報通信学会

キーワード

• single electron
• nanodot
• logic gate
• dot array
• Coulomb blockade

詳細情報

• CRID: 1390282679354715008
• NII論文ID: 10030941423
• NII論文ID: 130002135535
• NII書誌ID: AA10826283
• DOI: 10.1587/transele.e95.c.865
• BIBCODE: 2012IEITE..95..865J
• ISSN: 17451353
• ISSN: 09168524
• Web Site: https://www.jstage.jst.go.jp/article/transele/E95.C/5/E95.C_5_865/_pdf
• 本文言語コード: en
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