高い(電子・正孔)移動度を有する高性能な統合化 CMOS デバイスの提案 Proposal of High-Performance Synthesized-CMOS Devices with High-Electron & Hole Mobilities

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By using Synthesized Crystal Growth Technology which can simultaneously grow several kinds of semiconductor crystals on a single substrate, it is proposed that high-performance Synthesized-CMOS Devices with high electron & hole mobilities can realize both of ultra high speed operation and ultra low power dissipation. Assuming the supply voltage of 3.0V and operation temperature at 77K, it is estimated that CMOS devices fabricated by the combination of (p-GaAs/n-Ge) crystals may show the most high performance characteristics among many combinations of element and III-V compound semiconductors. From the circuit simulations of CMOS inverter chain, delay time (τ) and product of delay time and power dissipation (τP) may be improved by a factor of 15 and 14,respectively, in comparison with the conventional Si-type CMOS devices. Moreover, it is expected that the integration density of the Synthesized-CMOS Devices may become higher by about 10 times.

収録刊行物

  • 富山県立大学紀要

    富山県立大学紀要 1, 60-68, 1991-03-30

    富山県立大学

各種コード

  • NII論文ID(NAID)
    110000477624
  • NII書誌ID(NCID)
    AN10358595
  • 本文言語コード
    JPN
  • ISSN
    09167633
  • データ提供元
    NII-ELS 
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