100-Gbit/s Logic IC using InP HEMTs

Bibliographic Information

Other Title
  • InP HEMTを用いた100-Gbit/s論理IC

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Abstract

This paper describes 100-Gbit/s multiplexing operation of a selector IC and demultiplexing operation of a D-type flip-flop (D-FF) using a production-level 0.1-μm gate InP HEMT IC technology. We confirmed clear eye-openings of the selector IC at 100 Gbit/s and its error-free operation by using a test chip containing the selector and the D-FF. To the best of our knowledge, this is the first report on 100-Gbit/s operation of a transistor-based integrated circuit.

Journal

  • IEICE technical report. Microwaves

    IEICE technical report. Microwaves 102 (558), 19-24, 2003-01-09

    The Institute of Electronics, Information and Communication Engineers

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Details 詳細情報について

  • CRID
    1572824502283371264
  • NII Article ID
    110003179190
  • NII Book ID
    AN10013185
  • Text Lang
    ja
  • Data Source
    • CiNii Articles

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