進化手法とデータの直接回路化を用いたパターン認識用LSI  [in Japanese] Pattern Recognition LSI's Designed by Direct Data Implementation Technique Using an Evolutionary Algorithm  [in Japanese]

パターンデータから基本ゲート回路(真理値表)を直接生成し, パターン認識用集積回路を設計する手法を提案する.遺伝的アルゴリズムを用いて真理値表が未知パターンで, 実応用レベルの問題の個別事例データを直接集積回路化することが可能になると考える.英単語の発音記号推論チップの開発に本手法を適用し, プロトタイプを試作した.この結果, 推論速度500ns/音素, 回路数266Kゲート, 認識率81.9%を得た.さらに, 高い耐故障性能(Graceful Degradation)を有することをシミュレーション実験により示した.

A pattern recognition LSI design methodology using an evolutionary algorithm and direct data implementation technique is proposed.Pattern data are converted into truth tables, and the tables are evolved to match unknown pattern data by using genetic algorithm.The evolved truth tables are simply implemented onto FPGA chips.By using the current high density FPGA chips, specialized pattern recognition chips for individual practical tasks can be rapidly developed at user-sites.We applied this methodology to develop an English pronunciation reasoning chip.The chip was designed with 266K gates and its prototype showed a reasoning speed of 500ns/phoneme and reasoning accuracy rate of 81.9%.Furthermore, simulation results showed high fault tolerance of the proposed LSIs.