A Worst-Case Optimization Approach with Circuit Performance Model Scheme

• TAKAHASHI Masayuki

  Semiconductor Company, Sony Corporation

• LU Jin-Qin

  Semiconductor Company, Sony Corporation

• OGAWA Kimihiro

  Semiconductor Company, Sony Corporation

• ADACHI Takehiko

  Faculty of Engineering, Yokohama National University

抄録

In this paper, we describe a worst-case design optimization approach for statistical design of integrated circuits with a circuit performance model scheme. After formulating worst-case optimization to an unconstrained multi-objective function minimization problem, a new objective function is proposed to find an optimal point. Then, based on an interpolation model scheme of approximating circuit performance, realistic worst-case analysis can be easily done by Monte Carlo based method without increasing much the computational load. The effectiveness of the presented approach is demonstrated by a standard test function and a practical circuit design example.

収録刊行物

• IEICE transactions on fundamentals of electronics, communications and computer sciences

  IEICE transactions on fundamentals of electronics, communications and computer sciences 78 (3), 306-313, 1995-03-25

  一般社団法人電子情報通信学会

キーワード

• worst-case optimization
• unconstrained multi-objective function minimization
• objective function
• stochastic interpolation model
• circuit simulation
• Monte Carlo analysis

詳細情報

• CRID: 1573668927146060416
• NII論文ID: 110003207473
• NII書誌ID: AA10826239
• ISSN: 09168508
• 本文言語コード: en
• データソース種別:
  • CiNii Articles