New Write/Erase Operation Technology for Flash EEPROM Cells to Improve the Read Disturb Characteristics

• ENDOH Tetsuo

  Research Institute of Electrical Communication, Tohoku University

• IIZUKA Hirohisa

  Microelectronics Engineering Lab. Toshiba

• SHIROTA Riichirou

  Microelectronics Engineering Lab. Toshiba

• MASUOKA Fujio

  Research Institute of Electrical Communication, Tohoku University

抄録

This paper describes the new write/erase operation methods in order to improve the read disturb characteristics for Flash EEPROM cells which are written by channel hot electron injection and erased by F-N tunneling emission from the floating gate to the substrate. The new operation methods is either applying a reverse polarity pulse after each erase pulse or applying a series of shorter erase pulses instead of a long single erase pulse. It is confirmed that by using the above operation methods, the leakage current can be suppressed, and then the read disturb life time after 10^5 cycles write/erase operation is more than 10 times longer in comparison with the conventional method. This memory cell by using the proposed write/erase operation method has superior potential for application to 256 Mbit Flash memories as beyond.

収録刊行物

• IEICE transactions on electronics

  IEICE transactions on electronics 80 (10), 1317-1323, 1997-10-25

  一般社団法人電子情報通信学会

キーワード

• flash memory
• read disturb characteristics
• write
• erase operation
• stress leakage current

詳細情報

• CRID: 1572261552372248832
• NII論文ID: 110003211141
• NII書誌ID: AA10826283
• ISSN: 09168524
• 本文言語コード: en
• データソース種別:
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