ILP-Based Program Path Analysis for Bounding Worst-Case Inter-Task Cache Conflicts

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著者

    • TOMIYAMA Hiroyuki
    • Department of Information Engineering, the Graduate School of Information Science, Nagoya University
    • DUTT Nikil
    • Center for Embedded Computer Systems, University of California

抄録

The unpredictable behavior of cache memory makes it difficult to statically analyze the worst-case performance of real-time systems. This problem is further exacerbated in the case of preemptive multitask systems because of inter-task cache interference, called Cache-Related Preemption Delay (CRPD). This paper proposes an approach to analyzing the tight upper bound on CRPD which a task might impose on lower-priority tasks. Our method finds the program execution path which requires the maximum number of cache blocks using an integer linear programming technique. Experimental results show that our approach provides up to 69% tighter bounds on CRPD than a conservative approach.

収録刊行物

  • IEICE transactions on information and systems

    IEICE transactions on information and systems 87(6), 1582-1587, 2004-06-01

    一般社団法人電子情報通信学会

参考文献:  18件中 1-18件 を表示

被引用文献:  1件中 1-1件 を表示

各種コード

  • NII論文ID(NAID)
    110003214035
  • NII書誌ID(NCID)
    AA10826272
  • 本文言語コード
    ENG
  • 資料種別
    SHO
  • ISSN
    09168532
  • データ提供元
    CJP書誌  CJP引用  NII-ELS 
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