A 350 - MS/s 3.3 - V 8 - bit CMOS D/A Converter Using a Delayed Driving Scheme

• KOHNO Hiroyuki

  Mitsubishi Electric Corporation

• NAKAMURA Yasuyuki

  Mitsubishi Electric Corporation

• MIKI Takahiro

  Mitsubishi Electric Corporation

• AMISHIRO Hiroyuki

  Mitsubishi Electric Corporation

• OKADA Keisuke

  Mitsubishi Electric Corporation

• SUMI Tadashi

  Mitsubishi Electric Corporation

抄録

High-end graphic systems with 3 million pixels require 8-bit D/A converters with more than 300-MS/s conversion rate. Furthermore, D/A converters need to operate with low supply voltage when they are integrated with large-scale digital circuits on a half-micron CMOS process. This paper describes a 350-MS/s 8-bit CMOS D/A converter with 3.3-V power supply. A current source circuit with a delayed driving scheme is developed. This driving scheme reduces a fluctuation of internal node voltage of the current source circuit and high-speed switching is realized. In addition to this driving scheme, two stages of latches are inserted into matrix decoder for reducing glitch energy and for enhancing decoding speed. The D/A converter is fabricated in a 0.5-μm CMOS process with single poly-silicon layer and double aluminum layers. Its settling time is less than 2.4 ns and it successfully operates at 350 MS/s.

収録刊行物

• IEICE transactions on fundamentals of electronics, communications and computer sciences

  IEICE transactions on fundamentals of electronics, communications and computer sciences 80 (2), 334-338, 1997-02-25

  一般社団法人電子情報通信学会

キーワード

• D
• A converter
• current source
• current switch
• delayed driving sheme

詳細情報

• CRID: 1571417127441565824
• NII論文ID: 110003216295
• NII書誌ID: AA10826239
• ISSN: 09168508
• 本文言語コード: en
• データソース種別:
  • CiNii Articles