Performance Evaluation of Cell Delay Reduction Control using Pushout Buffer Switch

• MOMOI Yasunori

  Dept. of Electro. and Commun., Meiji University

• KITAMI Tokuhiro

  Dept. of Electro. and Commun., Meiji University

Bibliographic Information

Other Title

• Pushout Buffer による交換遅延抑制制御の性能評価

Abstract

This paper evaluates the performance of cell delay reduction control using pushout buffer switch. The pushout buffer uses the accumulated cell delay in the arriving cells as the priority measure in cell forwarding process at each switching stage. The simulation results include average delay, delay variance, 99.9% delay, and autocorrelation of delay. The authors reveals that the proposed techinque enables to efficiently reduce the end-to-end cell delay in multistage switching network.

Journal

• Technical report of IEICE. SSE

  Technical report of IEICE. SSE 99 (334), 57-62, 1999-09-28

  The Institute of Electronics, Information and Communication Engineers

Keywords

• ATM switch
• multi-stage
• cell delay
• pushout buffer
• autocorrelation

Details

• CRID: 1570009752563288576
• NII Article ID: 110003235969
• NII Book ID: AN10060742
• ISSN: 09135685
• Text Lang: ja
• Data Source:
  • CiNii Articles