3-9 アナログDCT演算回路による画像圧縮センサの検討 [in Japanese] An Image Compression Sensor with Analog DCT Operations [in Japanese]
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A parallel architecture is proposed for analog DCT operations using floating-gate transistors with differential inputs and feedback. All operations are in voltage mode. Only one terminal is required for the feedback which is capable of suppressing the distortions due to active elements. Implementing DCT operation circuits together with an array of photosensors, an image compression sensor can be realized.