Low switching loss power MOSFET with dual gate structure (Electron devices: 第15回先端半導体デバイスの基礎と応用に関するアジア・太平洋ワークショップ(AWAD2007)) Low Switching Loss Power MOSFET with Dual Gate Structure

Abstract

Low gate charge power vertical double-diffused MOSFET devices are required for high frequency circuit system. In this study, we proposed a power MOSFET structure with a dual gate structure which realizes the small gate charge without significantly degrading breakdown voltage. The dual gate eliminates partial gate area which effects switching speed and switching loss strongly. The dual gate structure features the formation of removed gate area portion combining with the additional np-region at the surface of the n drift layer. Reduction of the gate charge results in an improvement of switching performance. The gate charge and the figure of merit of the dual gate with np-region cell structure are reduced 49% and 33% compared with those of the conventional cell, respectively.

Journal

IEICE technical report. Electron devices   [List of Volumes]

IEICE technical report. Electron devices 107(110), 311-314, 2007-06-18  [Table of Contents]

The Institute of Electronics, Information and Communication Engineers

References:  7

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Codes

  • NII Article ID (NAID) :
    110006343841
  • NII NACSIS-CAT ID (NCID) :
    AN10012954
  • Text Lang :
    ENG
  • Article Type :
    ART
  • ISSN :
    09135685
  • NDL Article ID :
    8805192
  • NDL Source Classification :
    ZN33(科学技術--電気工学・電気機械工業--電子工学・電気通信)
  • NDL Call No. :
    Z16-940
  • Databases :
    CJP  NDL  NII-ELS