抄録
LSI高位合成において,モジュール(演算器,レジスタ)間の結線数やマルチプレクサ数,マルチプレクササイズの最小化はスケジュール長,演算器数,レジスタ数の最小化と並んでLSI面積や動作性能の点で重要である.著者らは先に高位合成の3つの主なタスクであるスケジュール,演算器割り当て,レジスタ割り当てを同時に取り扱う整数計画を提案しているが,本稿ではこれに加えて演算器のポート割り当てを加味したモジュール間結線数,マルチプレクサ数,マルチプレクササイズの評価を組み込んだ高位合成の整数計画問題(ILP)記述を提案している.これにより,スケジュール,演算器割り当て,レジスタ割り当て,ポート割り当てを同時に調整して結線数,マルチプレクサ数,マルチプレクササイズを最小化することを可能としている.
In high-level synthesis of LSI, it is an important task to minimize the number of connections between modules (functional units and registers), and the number and sizes of multiplexers as well as the length of schedule, and the number of functional units and registers in terms of LSI chip area and operation performance. Recently, the authors have proposed an ILP description which executes simultaneously the three main tasks of high-level synthesis: scheduling, functional unit assignment, and register assignment. As an extension of this ILP description, this paper proposes an ILP-based treatment of connections between modules and multiplexers considering port assignment of functional units. The main contribution of this paper is to provide a general framework to minimize the number of connections, the number and sizes of multiplexers in cooperation with the adjustment of scheduling, functional unit assignment, register assignment, and port assignment of functional unit.
