A High Throughput Medium Access Control Implementation Based on IEEE 802.11e Standard

• HUANG Min Li

  School of Engineering, Korea Advanced Institute of Science and Technology

• LEE Jin

  School of Engineering, Korea Advanced Institute of Science and Technology

• SETIAWAN Hendra

  Department of Computer Science and Electronics Engineering, Kyushu Institute of Technology

• OCHI Hiroshi

  Department of Computer Science and Electronics Engineering, Kyushu Institute of Technology

• PARK Sin-Chong

  School of Engineering, Korea Advanced Institute of Science and Technology

Abstract

With the growing demand for high-performance multimedia applications over wireless channels, we need to develop a Medium Access Control (MAC) system that supports high throughput and quality of service enhancements. This paper presents the standard analysis, design architecture and design issues leading to the implementation of an IEEE 802.11e based MAC system that supports MAC throughput of over 100Mbps. In order to meet the MAC layer timing constraints, a hardware/software co-design approach is adopted. The proposed MAC architecture is implemented on the Xilinx Virtex-II Pro Field-Programmable Gate Array (FPGA) (XC2VP70-5FF1704C) prototype, and connected to a host computer through an external Universal Serial Bus (USB) interface. The total FPGA resource utilization is 11, 508 out of 33, 088 (34%) available slices. The measured MAC throughput is 100.7Mbps and 109.2Mbps for voice and video access categories, transmitted at a data rate of 260Mbps based on IEEE 802.11n Physical Layer (PHY), using the contention-based hybrid coordination function channel access mechanism.

Journal

• IEICE Transactions on Communications

  IEICE Transactions on Communications E93-B (4), 948-960, 2010

  The Institute of Electronics, Information and Communication Engineers

Keywords

• IEEE 802.11e
• MAC
• EDCA
• FPGA

Details

• CRID: 1390001204374399488
• NII Article ID: 10026844906
• NII Book ID: AA10826261
• DOI: 10.1587/transcom.e93.b.948
• ISSN: 17451345
• ISSN: 09168516
• Web Site: http://www.jstage.jst.go.jp/article/transcom/E93.B/4/E93.B_4_948/_pdf
• Text Lang: en
• Data Source:
  • JaLC
  • Crossref
  • CiNii Articles
• Abstract License Flag: Disallowed