-
- HUA Guohuan
- National ASIC system Engineering Research Center, Southeast University
-
- ZHUANG Hualong
- National ASIC system Engineering Research Center, Southeast University
-
- XU Shen
- National ASIC system Engineering Research Center, Southeast University
-
- SUN Weifeng
- National ASIC system Engineering Research Center, Southeast University
-
- LI Zhiqun
- National ASIC system Engineering Research Center, Southeast University
抄録
Two voltage controlled current source (VCCS) models of double-channel p-type lateral extended drain MOS (DPLEDMOS) are firstly proposed to analyze the energy recovery circuit (ERC) efficiency of PDP data driver IC. In terms of the mathematical function between ID and VDS, the VCCS models are created. The presented models can be embedded in system software Saber to simulate the ERC waveform of data driver IC. A test board and a PDP system are used to verify the accuracy of the VCCS models. The experimental measurements agree with the simulation results very well and the maximum model error is 3.89%. Simulation results also show that the ERC efficiency of PDP data driver IC is influenced by three factors: the value of charge time TERC, the drain current ID, and the capacitance of CL. In an actual PDP system, TERC is restricted and CL is changeless. The ERC efficiency of PDP data driver IC can be improved significantly by using DPLEDMOS which has higher ID capacity. The proposed VCCS models of DPLEDMOS can be used to predict the ERC efficiency accurately.
収録刊行物
-
- IEICE Transactions on Electronics
-
IEICE Transactions on Electronics E96.C (8), 1061-1067, 2013
一般社団法人 電子情報通信学会
- Tweet
詳細情報 詳細情報について
-
- CRID
- 1390001204377955840
-
- NII論文ID
- 130003370454
-
- ISSN
- 17451353
- 09168524
-
- 本文言語コード
- en
-
- データソース種別
-
- JaLC
- Crossref
- CiNii Articles
-
- 抄録ライセンスフラグ
- 使用不可