CMOS Application of Single-Grain Thin Film Transistor Produced Using Metal Imprint Technology

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  • Makihira Kenji
    Center for Microelectronic Systems, Kyushu Institute of Technology
  • Yoshii Masahito
    Center for Microelectronic Systems, Kyushu Institute of Technology
  • Asano Tanemasa
    Center for Microelectronic Systems, Kyushu Institute of Technology

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A novel technology which is termed metal imprint has been developed for positioning and growing large thin-film Si grains on amorphous substrates. The metal imprint is carried out using Ni coated Si tip arrays and crystallization is carried out in solid phase. This technology enables us to fabricate a grain-boundary-free thin-film transistor (TFT) in a single-grain by aligning the position of the channel and that of the imprinted site. Single-grain TFTs having the channel in the single-grains which were fabricated using a high temperature process showed the field effect mobility up to 450 cm2/Vs for n-channel and up to 260 cm2/Vs for p-channel. Single-grain TFTs showed better threshold controllability than TFTs fabricated on Si films prepared by conventional solid phase crystallization (SPC). Complementary-metal-oxide-semiconductor (CMOS) circuits composed of single-grain TFTs have been fabricated. CMOS inverters composed of single-grain TFTs showed superior transfer characteristics to that composed of SPC-polycrystalline Si TFTs. The 3-μm CMOS ring oscillator which operated with the supply voltage down to 2 V showed the propagation delay time of less than 6.7 ns/stage at 7 V.

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