Two-dimensional numerical analyses of short channel GaAs MESFETs for large-scale integration

この論文をさがす

著者

    • 広瀬, 真由美 ヒロセ, マユミ

書誌事項

タイトル

Two-dimensional numerical analyses of short channel GaAs MESFETs for large-scale integration

著者名

広瀬, 真由美

著者別名

ヒロセ, マユミ

学位授与大学

東京工業大学

取得学位

博士 (工学)

学位授与番号

乙第2351号

学位授与年月日

1992-04-30

注記・抄録

博士論文

目次

  1. 論文目録 / (0002.jp2)
  2. TABLE OF CONTENTS / p7 (0009.jp2)
  3. ABSTRACT / p3 (0005.jp2)
  4. TABLE OF CONTENTS / p7 (0009.jp2)
  5. LIST OF SYMBOLS / p11 (0013.jp2)
  6. ACKNOWLEDGMENTS / p15 (0017.jp2)
  7. CHAPTER1 INTRODUCTION / p1 (0019.jp2)
  8. 1.1 Background of GaAs MESFET Technology for Digital ICs / p1 (0019.jp2)
  9. 1.2 Problems in Short Gate GaAs MESFETs / p3 (0021.jp2)
  10. 1.3 Purpose of This Thesis / p4 (0022.jp2)
  11. CHAPTER2 A TWO-DIMENSIONAL NUMERICAL MODEL FOR GaAs MESFETS / p7 (0025.jp2)
  12. 2.1 Introduction / p7 (0025.jp2)
  13. 2.2 Fundamental Equations / p8 (0026.jp2)
  14. 2.3 GaAs Properties and Physical Parameters / p10 (0028.jp2)
  15. 2.4 Electron Velocity Model / p11 (0029.jp2)
  16. 2.5 Schottky Contact Model / p16 (0034.jp2)
  17. 2.6 Other Boundary Conditions / p19 (0037.jp2)
  18. 2.7 Semi-Insulating Substrate Model / p20 (0038.jp2)
  19. CHAPTER3 AN IMPROVED ELECTRON MOBILITY MODEL FOR A TWO-DIMENSIONAL GaAs MESFET MODEL / p22 (0040.jp2)
  20. 3.1 Intyoduction / p22 (0040.jp2)
  21. 3.2 Improved Electron Mobility Model / p24 (0042.jp2)
  22. 3.3 MESFET with an Ion-Implanted Channel Layer / p25 (0043.jp2)
  23. 3.4 MESFET with an MBE-Grown Channel Layer / p38 (0056.jp2)
  24. 3.5 MESFET with a very short gate / p43 (0061.jp2)
  25. 3.6 Summary of Chapter 3 / p48 (0066.jp2)
  26. CHAPTER4 STRUCTURE DEPENDENCE OF SHORT CHANNEL EFFECTS IN GaAs MESFETS / p49 (0067.jp2)
  27. 4.1 Introduction / p49 (0067.jp2)
  28. 4.2 Five FET Structure Models / p51 (0069.jp2)
  29. 4.3 Threshold Voltages and K-Values of the Five FET Structures / p57 (0075.jp2)
  30. 4.4 Short Channel Effects in a Conventional Structure / p61 (0079.jp2)
  31. 4.5 Reduction in the Short Channel Effects in the Other Four Structures / p68 (0086.jp2)
  32. 4.6 Summary of Chapter4 / p69 (0087.jp2)
  33. CHAPTER5 TEMPERATURE DEPENDENCE OF GaAs MESFET CHARACTERISTICS / p71 (0089.jp2)
  34. 5.1 Introduction / p71 (0089.jp2)
  35. 5.2 FET Structure Model / p72 (0090.jp2)
  36. 5.3 Results and Discussion / p74 (0092.jp2)
  37. 5.4 Summary of Chapter5 / p82 (0100.jp2)
  38. CHAPTER6 A POSSIBLE SCALING LIMIT FOR ION-IMPLANTED MESFETS / p83 (0101.jp2)
  39. 6.1 Introduction / p83 (0101.jp2)
  40. 6.2 FET Model and Scaling Rule / p85 (0103.jp2)
  41. 6.3 Barrier Height and Threshold Voltage of Scaled FET / p89 (0107.jp2)
  42. 6.4 Attainable Minimum Threshold Voltage / p94 (0112.jp2)
  43. 6.5 A Possible Scaling Limit for an Enhancement-Mode MESFET / p96 (0114.jp2)
  44. 6.6 Summary of Chapter6 / p98 (0116.jp2)
  45. CHAPTER7 ION-IMPLANTED MESFET ISOLATION IN A SEMIINSULATING GaAs SUBSTRATE / p100 (0118.jp2)
  46. 7.1 Introduction / p100 (0118.jp2)
  47. 7.2 Device Isolation Model / p101 (0119.jp2)
  48. 7.3 I-V Characteristics of an N-I-N Structure / p103 (0121.jp2)
  49. 7.4 Minimum Isolation Distance / p111 (0129.jp2)
  50. 7.5 Summary of Chapter7 / p117 (0135.jp2)
  51. CHAPTER8 SUMMARY AND CONCLUDING REMARKS / p118 (0136.jp2)
  52. REFERENCES / p122 (0140.jp2)
  53. LIST OF PAPERS / p131 (0149.jp2)
  54. LIST OF PRESENTATIONS / p133 (0151.jp2)
0アクセス

各種コード

  • NII論文ID(NAID)
    500000097016
  • NII著者ID(NRID)
    • 8000000097244
  • DOI(NDL)
  • NDL書誌ID
    • 000000261330
  • データ提供元
    • NDL-OPAC
    • NDLデジタルコレクション
ページトップへ