Investigation on the short-channel silicon-on-insulator (SOI) MOSFET towards 0.1 μm gate length for future VLSI application VLSI応用のための短チャネルSOI MOSFETとその0.1μmレベルへのスケーリングに関する研究

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Author

    • Joachim Hans-Oliver ヨアヒム ハンス オリバー

Bibliographic Information

Title

Investigation on the short-channel silicon-on-insulator (SOI) MOSFET towards 0.1 μm gate length for future VLSI application

Other Title

VLSI応用のための短チャネルSOI MOSFETとその0.1μmレベルへのスケーリングに関する研究

Author

Joachim Hans-Oliver

Author(Another name)

ヨアヒム ハンス オリバー

University

大阪大学

Types of degree

博士 (工学)

Grant ID

乙第6883号

Degree year

1996-03-05

Note and Description

博士論文

Table of Contents

  1. Table of Contents/p1 (4コマ目)
  2. Abstract/p4 (6コマ目)
  3. Chapter1 General Introduction/p1 (7コマ目)
  4. 1.1 Device Miniaturization and VLSI Technology Trends/p1 (7コマ目)
  5. 1.2 Silicon-on-Insulator(SOI)Technology and Applications/p6 (10コマ目)
  6. 1.3 Contribution of This Work/p13 (13コマ目)
  7. Chapter2 SOI Substrates/p17 (15コマ目)
  8. 2.1 Hetero-and Homoepitaxial Techniques/p17 (15コマ目)
  9. 2.2 Polysilicon Recrystallization Techniques/p18 (16コマ目)
  10. 2.3 Separation by Implanted Oxygen(SIMOX)/p29 (21コマ目)
  11. 2.4 Wafer Bonding/p31 (22コマ目)
  12. Chapter3 The SOI MOSFET/p33 (23コマ目)
  13. 3.1 Distinction Between Thick-and Thin-Film SOI MOSFET's/p33 (23コマ目)
  14. 3.2 Different Operation Modes of the SOI MOSFET/p39 (26コマ目)
  15. Chapter4 Two-Dimensional Analytical Model/p43 (28コマ目)
  16. 4.1 Motivation/p43 (28コマ目)
  17. 4.2 The Concept of the Effective Substrate Voltage/p45 (29コマ目)
  18. 4.3 Derivation of the Potential Distribution/p48 (31コマ目)
  19. 4.4 Derivation of the Effective Substrate Voltage/p55 (34コマ目)
  20. 4.5 Threshold Voltage Model of the Fully-Depleted SOI MOSFET/p58 (36コマ目)
  21. Chapter5 Theoretical Investigation of the 0.1μm SOI MOSFET/p63 (38コマ目)
  22. 5.1 Inversion-Mode SOI MOSFET/p64 (39コマ目)
  23. 5.2 Accumulation-Mode SOI MOSFET/p102 (58コマ目)
  24. 5.3 Which is the Optimum Structure for the 0.1μm SOI MOSFET?/p116 (65コマ目)
  25. Chapter6 Fabrication of O.1μm SOI MOSFET's/p121 (67コマ目)
  26. 6.1 Transistor Design and Implantation Conditions/p121 (67コマ目)
  27. 6.2 Main Features of the O.1μm SOI MOSFET Fabrication Process/p131 (72コマ目)
  28. Chapter7 Experimental Results/p137 (75コマ目)
  29. 7.1 Transistor Characteristics/p137 (75コマ目)
  30. 7.2 Ring Oscillator Propagation Delay/p145 (79コマ目)
  31. 7.3 Comparison of Standard and Low-Dose SIMOX Substrates/p147 (80コマ目)
  32. 7.4 Interpretation of Experimental Results by the Analytical Model/p154 (84コマ目)
  33. 7.5 Effectiveness of Accumulation-Mode Transistor Counterdoping/p160 (87コマ目)
  34. Chapter8 Perspective and Possible Device Applications/p164 (89コマ目)
  35. 8.1 Merits and Drawbacks of Different SOI MOSFET Types For Scaling/p164 (89コマ目)
  36. 8.2 New O.1μm SOI MOSFET Structure/p166 (90コマ目)
  37. 8.3 Transient Effects in Dynamic Operation of Partially Depleted SOI MOSFET's/p169 (91コマ目)
  38. 8.4 Memory Applications of SOI CMOS/p172 (93コマ目)
  39. Chapter9 Summary/p179 (96コマ目)
  40. Appendix A Analytic Solutions of the Poisson's Equation/p183 (98コマ目)
  41. A1 Solution of Poisson's Equation With Parabolic Statement/p183 (98コマ目)
  42. A2 Solution of Poisson's Equation Using Green's Functions/p186 (100コマ目)
  43. References/p189 (101コマ目)
  44. List of Publications/p198 (106コマ目)
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Codes

  • NII Article ID (NAID)
    500000130644
  • NII Author ID (NRID)
    • 8000000130915
  • DOI(NDL)
  • Text Lang
    • und
  • NDLBibID
    • 000000294958
  • Source
    • Institutional Repository
    • NDL ONLINE
    • NDL Digital Collections

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