Architectures for RF frequency synthesizers
著者
書誌事項
Architectures for RF frequency synthesizers
（The Kluwer international series in engineering and computer science, . Analog circuits and signal processing ; SECS 693）
Kluwer Academic Publishers, c2002
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注記
Includes bibliographical references and index
内容説明・目次
内容説明
This text describes a conceptual framework for analyzing the performance of PLL frequency synthesizers, and presents optimization procedures for the different performance aspects. It contains basic information and in-depth knowledge, widely illustrated with practical design examples used in industrial products.
目次
Foreword. Preface. List of Acronyms. List of Symbols.
1. Introduction.
2. Tuning System Specifications.
3. Single-Loop Architectures.
4. Wide-Band Architectures.
5. Adaptive PLL Architecture.
6. Programmable Dividers.
7. Conclusions.
A. PLL Stability Limits Due to the Discrete-Time PFD/CP Operation.
B. Clock-Conversion PLLs for Optical Transmitters.
About the Author. Index.
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