Guide to RISC processors for programmers and engineers

著者

• Dandamudi, Sivarama P.

書誌事項

Guide to RISC processors for programmers and engineers

Sivarama P. Dandamudi

Springer, c2005

• : alk. paper

タイトル別名

Guide to RISC processors

注記

Includes bibliographical references (p. 375-377) and index

内容説明・目次

内容説明

Details RISC design principles as well as explains the differences between this and other designs. Helps readers acquire hands-on assembly language programming experience

目次

Part I--OVERVIEW: Introduction * Processor design issues * RISC principles Part II--ARCHITECTURES: MIPS architecture * SPARC architecture * PowerPC architecture * Itanium architecture * ARM architecture Part III--MIPS ASSEMBLY LANGUAGE: SPIM simulator and debugger * Assembly language overview * Procedures and the stack * Addressing modes * Arithmetic instructions * Conditional execution * Logical and shift operations * Recursion * Floating-point operations Appendixes: Number Systems * Character Representation * MIPS Instruction Set Summary * Programming Exercises Bibliography * Index

「Nielsen BookData」 より

詳細情報

• NII書誌ID(NCID): BA72367773
• ISBN:
  • 0387210172
• LCCN: 2004051373
• 出版国コード: us
• タイトル言語コード: eng
• 本文言語コード: eng
• 出版地: New York
• ページ数/冊数: xv, 387 p.
• 大きさ: 24 cm
• 分類:
  • LCC : QA76.5
  • DC22 : 004.3
• 件名:
  • LCSH : Reduced instruction set computers
  • LCSH : Computer architecture
  • LCSH : Assembler language (Computer program language)
  • LCSH : Microprocessors -- Programming