Design recipes for FPGAs : using verilog and VHDL

著者

    • Wilson, Peter R. (Peter Reid)

書誌事項

Design recipes for FPGAs : using verilog and VHDL

Peter Wilson

Elsevier/Newnes, 2016

2nd ed

大学図書館所蔵 件 / 1

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注記

Previous ed.: 2007

Includes bibliographical references and index

内容説明・目次

内容説明

This book provides a rich toolbox of design techniques and templates to solve practical, every-day problems using FPGAs. Using a modular structure, it provides design techniques and templates at all levels, together with functional code, which you can easily match and apply to your application. Written in an informal and easy to grasp style, this invaluable resource goes beyond the principles of FPGAs and hardware description languages to demonstrate how specific designs can be synthesized, simulated and downloaded onto an FPGA. In addition, the book provides advanced techniques to create `real world' designs that fit the device required and which are fast and reliable to implement.

目次

  • Introduction
  • An FPGA Primer
  • A Verilog Primer: The Essentials
  • Design Automation and Testing for FPGAs
  • Images and High-Speed Processing
  • Embedded Processors
  • Serial Communications
  • Digital Filters
  • Secure Systems
  • Memory
  • PS/2 Mouse Interface
  • PS/2 Keyboard Interface
  • A Simple VGA Interface
  • Synthesis
  • Behavioral Modeling in VHDL
  • Design Optimization
  • Verilog-AMS
  • Design Optimization Example: DES
  • Counters
  • Latches, Flip-Flops and Registers
  • Serial to Parallel and Parallel to Serial Conversion
  • ALU Functions
  • Decoders and Multiplexers
  • Finite State Machines in Verilog
  • Fixed Point Arithmetic in Verilog
  • Binary Multiplication
  • Bibliography

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