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COVER
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CONTENTS
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[OTHERS]
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Foreword to the Special Issue on Japanese Microprocessors
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109
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Overview of 32-bit V-Series Microprocessor
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110-122
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Design Philosophy of a High Performance BiCMOS Microprocessor
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123-129
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32-bit Microprocessors Based on the TRON Architecture Specification
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130-143
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Architecture of an AI Processor Chip (IP1704)
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144-149
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A 64-bit RISC Microprocessor for Parallel Computer Systems
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150-155
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A 32-bit LISP Processor for the Al Workstation ELIS with a Multiple Programming Paradigm Language, TAO
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156-164
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Design of the Dataflow Single-Chip Processor EMC-R
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165-173
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Processor Element Architecture for a Parallel Inference Machine, PIM/p
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174-182
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A String Search Processor LSI
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183-189
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Abstracts from "Transactions of Information Processing Society of Japan"
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190-200
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Abstracts from the SIG Notes
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201-248
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Contents of JOHO SHORI
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249-251
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Profiles of Authors
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252-256
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Information for Authors
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257
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Questionnaire
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258-259
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BACK COVER
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