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表紙
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目次
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Design-for-testability of a datapath using function of its original controller
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1-8
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A new class of sequential circuits with combinational test generation complexity for path delay faults
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9-16
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Fault set partition for efficient width compression
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17-24
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Short Path Delay Faults : Fault Model and Test Generation
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25-32
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Deterministic BIST Using Neighborhood Pattern Generation
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33-40
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Analytical Results for Reconfiguration of E-1 1/2-Track Switch Torus Arrays with Multiple Fault Types
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41-48
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[OTHERS]
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