Search Results1-20 of  25

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  • 松浦 達治 ID: 9000018517493

    Articles in CiNii:1

    • Technical trends of data converters: July 2011 (2011)
  • 松浦 達治 ID: 9000356889414

    Articles in CiNii:1

    • A proposal on Class-C Current-Reuse LC-oscillator with the negative feedback (2017)
  • 松浦 達治 ID: 9000356889483

    Articles in CiNii:1

    • An Activity Report of the IEEJ Investigation R&D Committee on Advanced Design Technology for Analog Electronic Circuits (2017)
  • 松浦 達治 ID: 9000356889838

    Articles in CiNii:1

    • Basic Study of Cyclic+SAR Hybrid A/D Converter (2017)
  • 松浦 達治 ID: 9000365486432

    Articles in CiNii:1

    • A Low Power 2.4GHz current reuse LNA and VCO in 0.18μm CMOS process (2017)
  • 松浦 達治 ID: 9000375853594

    Articles in CiNii:1

    • A study on zero voltage switching of Cuk DC/DC converter (2017)
  • 松浦 達治 ID: 9000382641293

    Articles in CiNii:1

    • A Study on Performance Improvement of Third Order Sturdy-MASH delta-sigma ADC (2018)
  • 松浦 達治 ID: 9000382641381

    Articles in CiNii:1

    • A proposal for expansion of the operating range of Class-C Current-Reuse LC-oscillator with the adaptive bias (2018)
  • 松浦 達治 ID: 9000397936580

    Articles in CiNii:1

    • Low Power tail-feedback LC-oscillator with adaptive self-bias (2018)
  • 松浦 達治 ID: 9000398961940

    Articles in CiNii:1

    • Design of Class-E Power Amplifier without RFC to consider High Switch Voltage (2018)
  • 松浦 達治 ID: 9000398962510

    Articles in CiNii:1

    • Area Reduction of AC/DC Converter Replaced to One Capacitor in PFC Circuits (2018)
  • 松浦 達治 ID: 9000399576734

    Articles in CiNii:1

    • Output Ripple Variation of DC-DC Converter by Random Switching Modulation (2018)
  • 松浦 達治 ID: 9000399576744

    Articles in CiNii:1

    • 3V single-end input SAR+0.7V differential input cyclic ADC (2018)
  • 松浦 達治 ID: 9000402442139

    Articles in CiNii:1

    • A Proposal of Discrete-Time Realization Method of Sturdy-MASH ΔΣA/D Converter and Construction of Low Power Consumption (2019)
  • 松浦 達治 ID: 9000402442151

    Articles in CiNii:1

    • Proposal of Design Method of C-2C DAC to Compensate Parasitic Capacitance of Floating Node (2019)
  • 松浦 達治 ID: 9000402442232

    Articles in CiNii:1

    • A Study on Buck Converter Controlled with Four Values Duty Ratio to Improve Load Response and Reduce Particular Noise Spectrum (2019)
  • MATRUURA Tatsuji ID: 9000018788009

    Renesas Electronics Corporation, Technology Development Unit, Mixed Signal Core Development Division (2012 from CiNii)

    Articles in CiNii:2

    • Technical Trends of Data Converters : July 2011 (2011)
    • Invited Talk : Technical Trend of Digitally Assisted A/D Converters : Jan. 2012 (2012)
  • MATSUURA Tatsuji ID: 9000001772382

    Renesas Technology (2006 from CiNii)

    Articles in CiNii:1

    • Tutorial : Introduction and State of the Art of A/D Converters for Radio Receivers (2006)
  • MATSUURA Tatsuji ID: 9000004775342

    Second System LSI Engineering Dept., System LSI Business Operation, System LSI Business Div. Semiconductor & Integrated Circuits Group, Hitachi, Ltd. (1999 from CiNii)

    Articles in CiNii:5

    • Substrate Noise Reduction using Active Guard Band Filters in Mixed-Signal Integrated Circuits (1995)
    • Mixed Analog and Digital 240Mbps CMOS-EPRML Read Channel Chip for Hard Disk Drives (1999)
    • A Current-cell Design Method for CMOS D/A Converter (1996)
  • MATSUURA Tatsuji ID: 9000018567234

    Articles in CiNii:14

    • Background Calibration Algorithm for Pipelined ADC with Open-Loop Amplifier using Split ADC Structure (2010)
    • Sigma-Delta Time-to-Digital Converter Architecture (2011)
    • Digital-to-Analog Converter Architecture for Low Distortion Signal Generation (2012)
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