Search Results1-8 of  8

  • 長野 隆洋 ID: 9000008189988

    Articles in CiNii:1

    • 電荷制御モデルを用いて最適化したアノ-ドエミッタ短絡形ゲ-トタ-ンオフサイリスタ (1986)
  • NAGANO Takahiro ID: 9000001119660

    Intellex Research Ltd. (2004 from CiNii)

    Articles in CiNii:2

    • The Outline of R & D Strategy for Electronics and Information Related Materials (2004)
    • 電子・情報デバイスの材料戦略概要 (ミニ特集 電子・情報材料 材料戦略) (2004)
  • NAGANO Takahiro ID: 9000004779026

    Semiconductor Development Center, SICD,Hitachi, Ltd. (1996 from CiNii)

    Articles in CiNii:2

    • Base-Biased BiNMOS Circuit for Low Voltage Operation (1993)
    • Low-Voltage SRAM Technologies for Battery-Operated Systems (1996)
  • Nagano T. ID: 9000004926697

    Central Research Laboratory,Hitachi,Ltd. (1995 from CiNii)

    Articles in CiNii:5

    • A 300MHz 4Mb Wavepipelined CMOS SRAM Using Multi-Phase PLL (1995)
    • 0.25μm Buried-Channel PMOSFET′s Using Channel Doping Through Amor phous Si Thin Film (1994)
    • A 6-ns 4-Mb CMOS SRAM with offset-Voltage Insensitive Current Sense Amplifiers (1994)
  • Nagano Takahiro ID: 9000253276446

    Hitachi Research Laboratory, Hitachi, Ltd. (1986 from CiNii)

    Articles in CiNii:1

    • A gate turn-off thyristor with shorted anode emitter optimized by charge-control model. (1986)
  • Nagano Takahiro ID: 9000256661055

    Intellex Research Ltd. (2004 from CiNii)

    Articles in CiNii:1

    • The Outline of R & D Strategy for Electronics and Information Related Materials (2004)
  • Nagano Takahiro ID: 9000391541193

    Hitachi Research Laboratory, Hitachi, Ltd. (1987 from CiNii)

    Articles in CiNii:1

    • Improvement in Sustainting Voltage and Its Modeling of Gate Turn-Off Thyristors with Floating Gate Structure (1987)
  • Nagano Takahiro ID: 9000391542019

    Hitachi Research Laboratory, Hitachi, Ltd. (1987 from CiNii)

    Articles in CiNii:1

    • Turn-Off Safe Operating Area of Gate Turn-Off Thyristors with Shorted Anode Emitter (1987)
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