Search Results1-15 of  15

  • AWASHIMA Toru ID: 9000004125819

    NEC Corporation (2009 from CiNii)

    Articles in CiNii:21

    • 動的再構成プロセサをC言語だけで設計可能に (LSI開発者ブック) (2005)
    • C Compiler for Dynamically Reconflgurable Processor : DRP (2004)
    • The Implementation of The Block Cipher RC6 on The Reconfigurable Processor (2004)
  • AWASHIMA Toru ID: 9000004896869

    C&C Research Laboratories, NEC Corporation (1996 from CiNii)

    Articles in CiNii:1

    • Messages to get a Job for Students (1996)
  • AWASHIMA Toru ID: 9000004971621

    School of Science and Engineering, Waseda University (1993 from CiNii)

    Articles in CiNii:13

    • Chip Compaction Method with Automatic Jog Insertion (1993)
    • A Top-Down Hierarchical Global and Detailed Routing Algorithm for Field-Programmable Gate Arrays (1993)
    • Introduction of Linear Objective Function to Force Directed Method for Analog Module and its Experimental Estimation (1993)
  • AWASHIMA Toru ID: 9000005107082

    System Devices Research Laboratories, NEC Corp. (2005 from CiNii)

    Articles in CiNii:1

    • Dynamically Reconfigurable Processor DRP and its C based Design Environment (2005)
  • AWASHIMA Toru ID: 9000239506693

    Renesas Electronics Corporation (2011 from CiNii)

    Articles in CiNii:1

    • Iterative Synthesis Methods Estimating Programmable-Wire Congestion in a Dynamically Reconfigurable Processor (2011)
  • AWASHIMA Toru ID: 9000241153794

    Renesas Electronics Corporation (2012 from CiNii)

    Articles in CiNii:1

    • Dynamically Reconfigurable Processor(DRP)Technology:Current Status and Future Prospects (2012)
  • AWASHIMA Toru ID: 9000241154467

    Renesas Electronics Corporation (2012 from CiNii)

    Articles in CiNii:1

    • Dynamically Reconfigurable Processor(DRP)Technology:Current Status and Future Prospects (2012)
  • AWASHIMA Toru ID: 9000241154942

    Renesas Electronics Corporation (2012 from CiNii)

    Articles in CiNii:1

    • Dynamically Reconfigurable Processor(DRP)Technology:Current Status and Future Prospects (2012)
  • AWASHIMA Toru ID: 9000241155294

    Renesas Electronics Corporation (2012 from CiNii)

    Articles in CiNii:1

    • Dynamically Reconfigurable Processor(DRP)Technology:Current Status and Future Prospects (2012)
  • AWASHIMA Toru ID: 9000241155375

    Renesas Electronics Corporation (2012 from CiNii)

    Articles in CiNii:1

    • Dynamically Reconfigurable Processor (DRP) Technology : Current Status and Future Prospects (2012)
  • AWASHIMA Toru ID: 9000241155789

    Renesas Electronics Corporation (2012 from CiNii)

    Articles in CiNii:1

    • Dynamically Reconfigurable Processor(DRP)Technology:Current Status and Future Prospects (2012)
  • AWASHIMA Toru ID: 9000397839469

    Tsusho Corporation. (2017 from CiNii)

    Articles in CiNii:1

    • Practice and consideration of problem-solving lesson by "Tanimoku Method" (2017)
  • Awashima Toru ID: 9000004844008

    the School of Science and Engineering, Waseda University (1993 from CiNii)

    Articles in CiNii:1

    • Placement, Routing, and Compaction Algorithms for Analog Circuits (Special Section on JTC-CSCC '92) (1993)
  • Awashima Toru ID: 9000020168063

    NEC Corporation (2010 from CiNii)

    Articles in CiNii:1

    • High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable Processor (2010)
  • Awashima Toru ID: 9000022077989

    Articles in CiNii:1

    • High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable Processor (2010)
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