Search Results1-8 of  8

  • CHIBAHARA Hiroyuki ID: 9000000757816

    ULSI Development Center, Mitsubisi Electric Corp. (2002 from CiNii)

    Articles in CiNii:1

    • Wet Processes for Making Cu Interconnection in LSI (2002)
  • CHIBAHARA Hiroyuki ID: 9000001818471

    (株)ルネサステクノロジ ウエハプロセス技術統括部 (2006 from CiNii)

    Articles in CiNii:2

    • Post CMP cleaning technology for low-k materials (2006)
    • Low-k材料のCMP後洗浄技術 (特集 CMP技術の克服するべき課題と今後の展開) (2006)
  • CHIBAHARA Hiroyuki ID: 9000017680929

    三菱電機(株)ULSI開発研究所 (1997 from CiNii)

    Articles in CiNii:1

    • A Study of Pattern Sensitivity in LSI Device Planarization (CMP) (1997)
  • CHIBAHARA Hiroyuki ID: 9000390887792

    Mitsubishi Electric Co.,Ltd. (2017 from CiNii)

    Articles in CiNii:1

    • Precise Fabrication of Wall Structure onto Thin Plate End with Interlayer Temperature Monitoring on Wire and Arc-based Additive Manufacturing (2017)
  • CHIBAHARA Hiroyuki ID: 9000402279333

    Mitsubishi Electric Corp. (2019 from CiNii)

    Articles in CiNii:1

    • Precise additive fabrication of wall structure on thin plate end with interlayer temperature monitoring (2019)
  • Chibahara Hiroyuki ID: 9000025070299

    Articles in CiNii:1

    • Enhancement of Post-Cu-Chemical Mechanical Polishing Cleaning Process for Low-k Substrate (2006)
  • Chibahara Hiroyuki ID: 9000401788255

    Articles in CiNii:1

    • Cu Dual-Damascene Interconnects with Direct Chemical Mechanical Polishing Process on Porous Low-kFilm (2010)
  • Chibahara Hiroyuki ID: 9000403279261

    Metal & Joining Material Group Materials & Processing Technology Department Advanced Technology R & D center Mitsubishi Electric Co., Ltd. (2018 from CiNii)

    Articles in CiNii:1

    • PRECISE FABRICATION AND CUTTING OF WALL STRUCTURE TO REPAIR THE THIN END OF PLATE USING INTERLAYER TEMPERATURE MONITORING ON WIRE AND ARC-BASED ADDITIVE MANUFACTURING (2018)
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