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  • DOSAKA Katsumi ID: 9000001620418

    System Core Technology Div., Renesas Technology Corp. (2009 from CiNii)

    Articles in CiNii:13

    • Embedded Low-Power Dynamic TCAM Architecture with Transparently Scheduled Refresh(Memory, <Special Section>Low-Power LSI and Low-Power IP) (2005)
    • Integration Architecture of Content Addressable Memory and Massive-Parallel Memory-Embedded SIMD Matrix for Versatile Multimedia Processor (2008)
    • On-Chip Memory Power-Cut Scheme Suitable for Low Power SoC Platform (2009)
  • DOSAKA Katsumi ID: 9000004813235

    the ULSI Laboratory, Mitsubishi Electric Corp. (1996 from CiNii)

    Articles in CiNii:2

    • A 90-MHz 16-Mb System Integrated Memory with Direct Interface to CPU (1996)
    • Trends in High-Speed DRAM Architectures (1996)
  • DOSAKA Katsumi ID: 9000004912897

    Articles in CiNii:6

    • コントロ-ラ付き16MキャッシュDRAM (特集"半導体") (1996)
    • The Development of the CDRAM with a Controller [1] : Refresh Control Method (1996)
    • The Development of the CDRAM with a Controller[2] : Active PullUp Control Method (1996)
  • DOSAKA Katsumi ID: 9000005107321

    Memory Devices Dept., ULSI Development Center, Mitsubishi Electric Corp. (2002 from CiNii)

    Articles in CiNii:2

    • Memory Circuit technology for High-Speed Low-Power System LSIs (2002)
    • Memory Circuit technology for High-Speed Low-Power System LSIs (2002)
  • DOSAKA Katsumi ID: 9000017684792

    Graduate School of Natural Science and Technology, Kanazawa Univ. (2010 from CiNii)

    Articles in CiNii:1

    • A Complete Charge Recycling TCAM with Checkerboard Array Arrangement for Low Power Applications (2010)
  • DOSAKA Katsumi ID: 9000262379124

    Renesas Electronics Corporation (2013 from CiNii)

    Articles in CiNii:36

    • A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI (2005)
    • A Novel Soft-Error Immune TCAM Architecture with Associated Embedded DRAM (2006)
    • A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI (2006)
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