Search Results1-20 of  20

  • Furutake Naoya ID: 9000025017572

    Articles in CiNii:1

    • A novel multilayered Ni-Zn-ferrite/TaN film for RF/mobile applications (Special issue: Solid state devices and materials) (2010)
  • Furutake Naoya ID: 9000025030819

    Articles in CiNii:1

    • Microstructure control of low-loss Ni-Zn ferrite by low-temperature sputtering for on-chip magnetic film (Special issue: Solid state devices and materials) (2009)
  • Furutake Naoya ID: 9000025038881

    Articles in CiNii:1

    • Impact of barrier metal sputtering on physical and chemical damages in low-k SiOCH films with various hydrocarbon content (Special issue: Solid state devices and materials) (2008)
  • FURUTAKE Naoya ID: 9000002166212

    Device Platforms Research Labs., NEC. (2007 from CiNii)

    Articles in CiNii:3

    • A Metallurgical Prescription Suppressing Stress-induced Voiding (SIV) in Cu lines (2004)
    • High Performance SiN-MIM Decoupling Capacitors with Surface-smoothed Bottom Electrodes for High-speed MPUs (2006)
    • Impact of Barrier Metal Sputtering on Low-k SiOCH Films with Various Chemical Structures (2007)
  • FURUTAKE Naoya ID: 9000004963669

    Renesas Electronics Corporation (2014 from CiNii)

    Articles in CiNii:13

    • Suppression of Stress Induced Open Failures between Via and Cu Wide Line by Inserting Ti Layer under Ta/TaN Barrier (2003)
    • A 65nm-node interconnect technology using ultra-thin low-k pore seal (2004)
    • Low Cost and Highly Reliable, 65nm-node Cu Dual Damascene Interconnects (2004)
  • FURUTAKE Naoya ID: 9000107344093

    System Devices Research Laboratories, NEC Corporation (2005 from CiNii)

    Articles in CiNii:1

    • Effects of the Metallurgical Properties of Upper Cu Film on Stress-Induced Voiding (SIV) in Cu Dual-Damascene Interconnects (2005)
  • Furutake Naoya ID: 9000081098934

    Articles in CiNii:1

    • Precise Taper-Angle-Control of Via Holes for Reliable Scaled-Down Low-k/Cu Interconnects (2010)
  • Furutake Naoya ID: 9000258180669

    System Devices Research Laboratories, NEC Corporation (2005 from CiNii)

    Articles in CiNii:1

    • Effects of the Metallurgical Properties of Upper Cu Film on Stress-Induced Voiding (SIV) in Cu Dual-Damascene Interconnects (2005)
  • Furutake Naoya ID: 9000401735722

    Articles in CiNii:1

    • Effects of the Metallurgical Properties of Upper Cu Film on Stress-Induced Voiding (SIV) in Cu Dual-Damascene Interconnects (2005)
  • Furutake Naoya ID: 9000401757705

    Articles in CiNii:1

    • 2007-04-24 (2007)
  • Furutake Naoya ID: 9000401768461

    Articles in CiNii:1

    • Impact of Barrier Metal Sputtering on Physical and Chemical Damages in Low-kSiOCH Films with Various Hydrocarbon Content (2008)
  • Furutake Naoya ID: 9000401778222

    Articles in CiNii:1

    • 2009-04-20 (2009)
  • Furutake Naoya ID: 9000401778236

    Articles in CiNii:1

    • Porous Low-kImpacts on Performance of Advanced LSI Devices with GHz Operations (2009)
  • Furutake Naoya ID: 9000401786483

    Articles in CiNii:1

    • 2010-04-20 (2010)
  • Furutake Naoya ID: 9000401795693

    Articles in CiNii:1

    • Improvement of Uniformity and Reliability of Scaled-Down Cu Interconnects with Carbon-Rich Low-kFilms (2011)
  • Furutake Naoya ID: 9000401803650

    Articles in CiNii:1

    • Basic Performance of a Logic Intellectual Property Compatible Embedded Dynamic Random Access Memory with Cylinder Capacitors in Low-$k$/Cu Back End on the Line Layers (2012)
  • Furutake Naoya ID: 9000401808558

    Articles in CiNii:1

    • Effects of Low-$k$ Stack Structure on Performance of Complementary Metal Oxide Semiconductor Devices and Chip Package Interaction Failure (2012)
  • Furutake Naoya ID: 9000401996568

    Articles in CiNii:1

    • Improvement of Uniformity and Reliability of Scaled-Down Cu Interconnects with Carbon-Rich Low-kFilms (2011)
  • Furutake Naoya ID: 9000402004513

    Articles in CiNii:1

    • Basic Performance of a Logic Intellectual Property Compatible Embedded Dynamic Random Access Memory with Cylinder Capacitors in Low-k/Cu Back End on the Line Layers (2012)
  • Furutake Naoya ID: 9000402009417

    Articles in CiNii:1

    • Effects of Low-kStack Structure on Performance of Complementary Metal Oxide Semiconductor Devices and Chip Package Interaction Failure (2012)
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