Search Results1-20 of  22

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  • Kenji Kise ID: 9000018481682

    Articles in CiNii:1

    • Software managed memory system for many-core architectures (2011)
  • Kenji Kise ID: 9000287207613

    Articles in CiNii:1

    • 3bOS: A flexible and lightweight embedded OS operated using only 3 buttons (2014)
  • KISE KENJI ID: 9000046015214

    Graduate School of Information Systems, The University of Electro-Communications:"Information infrastructure and applications", PRESTO, Japan Science and Technology Agency (JST) (2005 from CiNii)

    Articles in CiNii:1

    • The Bimode++ Branch Predictor Using the Feature of Extremely Biased Branches (2005)
  • KISE Kenji ID: 1000050323887

    東京工業大学大学院情報理工学研究科 (2015 from CiNii)

    Articles in CiNii:188

    • A Task Mapping Method to Mitigate Network Contention for Many-core Processors (2012)
    • Pipeline Bypassing Method for Distributed Shared-Buffer NoC Router (2012)
    • A Method for Efficient Use of CMP Cooperative Caching with Extra Entries of Directory (2012)
  • KISE Kenji ID: 9000005986217

    Graduate School of Eng., Utsunomiya Univ. (2005 from CiNii)

    Articles in CiNii:8

    • Protective effect for damage by salt attack with high-strength concrete (1999)
    • Penetration and Fixing Characteristic of Chloride Ion in Cement Paste (2000)
    • 1015 Study on the Strength Development of Concrete Using Ground Granulated Blast Furnace Slag under Various Temperature Conditions : Part 2 Consideration of Strength Revision of Concrete Using Ground Granulated Blast Furnace Slag (2004)
  • KISE Kenji ID: 9000014536038

    Articles in CiNii:6

    • ソフトウェア論文座談会 (2009)
    • Cell Speed Challenge 2007 Contest Report : Did you Enjoy the Cell Speed Challenge 2007? (2007)
    • Now, It is a Time of Multi-core Processors! (2008)
  • KISE Kenji ID: 9000046007312

    Graduate School of Information Systems, The University of Electro-Communications (2005 from CiNii)

    Articles in CiNii:1

    • The design and implementation of development support tool S-CAT for multiple S-DSMs (2005)
  • KISE Kenji ID: 9000107316407

    Graduate School of Information Science and Engineering, Tokyo Institute of Technology (2011 from CiNii)

    Articles in CiNii:1

    • Efficient Execution of Floating Point Instructions in CRIB (2011)
  • KISE Kenji ID: 9000242566708

    Tokyo Institute of Technology (2013 from CiNii)

    Articles in CiNii:1

    • 7.4 Multifunction NoC Router Architecture(7. Responsiveness,<Special Survey>Dependable VLSI System) (2013)
  • KISE Kenji ID: 9000258237833

    Graduate School of Information Science and Engineering, Tokyo Institute of Technology (2007 from CiNii)

    Articles in CiNii:1

    • The COINS TMD Implementation for the Alpha Architecture and Its Performance Comparison with GCC (2007)
  • KISE Kenji ID: 9000269008123

    Graduate School of Information Science and Engineering, Tokyo Institute of Technology (2014 from CiNii)

    Articles in CiNii:1

    • Design and Implementation of The 1st IPSJ SIG-ARC High-Performance Processor Design Contest (2014)
  • KISE Kenji ID: 9000290372248

    Tokyo Institute of Technology (2013 from CiNii)

    Articles in CiNii:1

    • TMR execution on SmartCore system for dependable many-core processors (2013)
  • KISE Kenji ID: 9000311504949

    Tokyo Institute of Technology (2015 from CiNii)

    Articles in CiNii:1

    • Ultrasmall: A Tiny Soft Processor Architecture with Multi-Bit Serial Datapaths for FPGAs (2015)
  • KISE Kenji ID: 9000350641085

    Tokyo Institute of Technology (2017 from CiNii)

    Articles in CiNii:1

    • A High Performance FPGA-Based Sorting Accelerator with a Data Compression Mechanism (2017)
  • KISE Kenji ID: 9000380977443

    Tokyo Institute of Technology (2018 from CiNii)

    Articles in CiNii:1

    • ArchHDL: A Novel Hardware RTL Modeling and High-Speed Simulation Environment (2018)
  • KISE Kenji ID: 9000404528605

    Department of Computer Science, Tokyo Institute of Technology (2019 from CiNii)

    Articles in CiNii:1

    • LEF: An Effective Routing Algorithm for Two-Dimensional Meshes (2019)
  • Kenji Kise ID: 9000004376164

    Graduate School of Information Systems, University of Electro-Communications (2003 from CiNii)

    Articles in CiNii:1

    • Design and Preliminary Implementation of a Particle Simulation Machine for Efficient Short - range Interaction Computations (2003)
  • Kenji Kise ID: 9000017545179

    Articles in CiNii:1

    • SimCell: A Processor Simulator for Multi-Core Architecture Research (2009)
  • Kenji Kise ID: 9000348892179

    Articles in CiNii:1

    • The COINS TMD Implementation for the Alpha Architecture and Its Performance Comparison with GCC (2007)
  • Kise Kenji ID: 9000021945647

    Graduate School of Information Science and Engineering, Tokyo Institute of Technology (2009 from CiNii)

    Articles in CiNii:1

    • SimCell: A Processor Simulator for Multi-Core Architecture Research (2009)
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