Search Results1-20 of  28

  • 1 / 2
  • MAEGAWA Shigeto ID: 9000002165493

    Mitsubishi Electric (1999 from CiNii)

    Articles in CiNii:1

    • Evaluation of SOI Wafer Quality and Technological Issues to be Solved (1999)
  • MAEGAWA Shigeto ID: 9000004815042

    Advanced Device Development Dept., Renesas Technology Corp. (2005 from CiNii)

    Articles in CiNii:14

    • Impact of μA-ON-Current Gate-All-Around TFT (GAT) for Static RAM of 16Mb and beyond (1996)
    • Impact of μ A-ON-Current Gate All-Around TFT (GAT) for 16MSRAM and Beyond (1995)
    • A 90nm-node SOI Technology for RF Applications (2004)
  • MAEGAWA Shigeto ID: 9000005104588

    Renesas Technology Corporation (2005 from CiNii)

    Articles in CiNii:3

    • Recovery of Silicon by Coherent Phonon Excited by Free Electron Laser Irradiation (2005)
    • Bootstrap Pass-Transistor Logic with Active Body-Biasing Control on PD-SOI (2005)
    • High Performance CMOS Circuit by Using Charge Recycling Actively Body-bias Controlled SOI (2005)
  • MAEGAWA Shigeto ID: 9000005753367

    Department of Electronics, Faculty of Engineering Kobe University (1981 from CiNii)

    Articles in CiNii:1

    • Brillouin Scattering in Layered Semiconductors using Microprocessor-controlled Fabry-Perot Interferometer : Physical Acoustics II (1981)
  • MAEGAWA Shigeto ID: 9000016265653

    Renesas Technology Corp. (2007 from CiNii)

    Articles in CiNii:1

    • Boosted Voltage Scheme with Active Body-Biasing Control on PD-SOI for Ultra Low Voltage Operation (2007)
  • MAEGAWA Shigeto ID: 9000016265702

    Renesas Technology Corp. (2007 from CiNii)

    Articles in CiNii:1

    • A Capacitorless Twin-Transistor Random Access Memory (TTRAM) on SOI (2007)
  • MAEGAWA Shigeto ID: 9000016816226

    Mixed Signal Device Technology Department, Devices & Analysis Technology Division, Renesas Electronics Corporation (2011 from CiNii)

    Articles in CiNii:2

    • Analysis of Snapback Phenomena in VDMOS Transistor having the High Second Breakdown Current : A High ESD Mechanism Analysis (2009)
    • ESD Robustness Improvement for Integrated DMOS Transistors-The Different Gate-Voltage Dependence of I_<t2> Between VDMOS and LDMOS Transistors (2011)
  • MAEGAWA Shigeto ID: 9000107305909

    ULSI Development Center, Mitsubishi Electric Corporation (2003 from CiNii)

    Articles in CiNii:1

    • Improvement of Surface Morphology of Epitaxial Silicon Film for Elevated Source/Drain Ultrathin Silicon-on-Insulator Complementary-Metal-Oxide-Semiconductor Devices (2003)
  • MAEGAWA Shigeto ID: 9000240236402

    Mixed Signal Device Tech. Dept. Renesas Electronics Corp.Advanced LSI Devices Research Renesas Electronics Corp. (2013 from CiNii)

    Articles in CiNii:5

    • Necessity of Pulse Hot Carrier Evaluation in Suppressing Self-Heating Effect for SOI Smart Power (2009)
    • Enhancement of Current Drivability in Field PMOS by Optimized Field Plate (2010)
    • Enhancement of Current Drivability in Field PMOS by Optimized Field Plate (2010)
  • MAEGAWA Shigeto ID: 9000243892941

    Mixed Signal Device Tech. Dept., Renesas Electronics Corp. (2014 from CiNii)

    Articles in CiNii:1

    • Past and Future Technology for Mixed Signal LSI (2014)
  • MAEGAWA Shigeto ID: 9000250202245

    Renesas Technology Corp. (2006 from CiNii)

    Articles in CiNii:26

    • Issue of SOI MOS Transistor and its Improvement (2001)
    • Impact of Actively Body-bias Controlled (ABC) SOI SRAM for Low-Voltage and High-Speed Operation (2004)
    • 0.35μm Large-Scale SOI Gate Array using Field Shield Isolation Technology (1997)
  • MAEGAWA Shigeto ID: 9000257902156

    Renesas Technology Corporation (2005 from CiNii)

    Articles in CiNii:1

    • Recovery of Silicon by Coherent Phonon Excited by Free Electron Laser Irradiation (2005)
  • Maegawa Shigeto ID: 9000004968385

    Renesas (2004 from CiNii)

    Articles in CiNii:6

    • Quality evaluation of SOI materials and technological issues to be solved (2000)
    • How Do We Lower the Power of CMOS Circuits in Advanced Technologies? (2004)
    • How Do We Lower the Power of CMOS Circuits in Advanced Technologies? (2004)
  • Maegawa Shigeto ID: 9000021735595

    Articles in CiNii:1

    • A 1 inch Format 1.5M Pixel IT-CCD Image Sensor for an HDTV Camera System. (1993)
  • Maegawa Shigeto ID: 9000079917988

    Articles in CiNii:1

    • High Soft-Error Tolerance Body-Tied Silicon-on-Insulator Technology with Partial Trench Isolation (2008)
  • Maegawa Shigeto ID: 9000258125834

    ULSI Laboratory, Mitsubishi Electric Corporation, Mizuhara 4–1, Itami 664, Japan (1995 from CiNii)

    Articles in CiNii:1

    • A 0.4.MU.m Gate-All-Around TFT(GAT) Using a Dummy Nitride Pattern for High-Density Memories. (1995)
  • Maegawa Shigeto ID: 9000258151689

    ULSI Laboratory, Mitsubishi Electric Corporation, 4-1, Mizuhara, Itami, Hyogo 664-8641, Japan (2000 from CiNii)

    Articles in CiNii:1

    • Direct Measurement of Transient Drain Currents in Partially-Depleted SOI N-Channel MOSFETs Using a Nuclear Microprobe for Highly Reliable Device Designs. (2000)
  • Maegawa Shigeto ID: 9000258166276

    ULSI Development Center, Mitsubishi Electric Corporation (2003 from CiNii)

    Articles in CiNii:1

    • Improvement of Surface Morphology of Epitaxial Silicon Film for Elevated Source/Drain Ultrathin Silicon-on-Insulator Complementary-Metal-Oxide-Semiconductor Devices (2003)
  • Maegawa Shigeto ID: 9000401652857

    Articles in CiNii:1

    • 1995-02-28 (1995)
  • Maegawa Shigeto ID: 9000401660206

    Articles in CiNii:1

    • 1996-02-28 (1996)
  • 1 / 2
Page Top