Search Results1-20 of  30

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  • Yasuhiko Nakashima ID: 9000287162317

    Articles in CiNii:1

    • Deep DVS in FU Array by Covering Process Variations with Data-Path Auto-fix (2012)
  • Yasuhiko Nakashima ID: 9000287162401

    Articles in CiNii:1

    • Deep DVS in FU Array by Covering Process Variations with Data-Path Auto-fix (2012)
  • NAKASHIMA YASUHIKO ID: 9000344831966

    Articles in CiNii:1

    • A Framework for Tree-based Checkpointing Architecture on FPGAs (VLSI設計技術) (2017)
  • NAKASHIMA YASUHIKO ID: 9000344833119

    Articles in CiNii:1

    • A Framework for Tree-based Checkpointing Architecture on FPGAs (コンピュータシステム) (2017)
  • NAKASHIMA YASUHIKO ID: 9000344835663

    Articles in CiNii:1

    • A Framework for Tree-based Checkpointing Architecture on FPGAs (リコンフィギャラブルシステム) (2017)
  • NAKASHIMA Yasuhiko ID: 9000356884103

    Articles in CiNii:1

    • A Compact Low-Latency Systematic Successive Cancellation Polar Decoder for Visible Light Communication Systems (コンピュータシステム) (2017)
  • NAKASHIMA Yasuhiko ID: 9000356884171

    Articles in CiNii:1

    • A prototype of Dimmable Visible Light Communication System on FPGA (コンピュータシステム) (2017)
  • NAKASHIMA Yasuhiko ID: 9000356885658

    Articles in CiNii:1

    • A Compact Low-Latency Systematic Successive Cancellation Polar Decoder for Visible Light Communication Systems (ディペンダブルコンピューティング) (2017)
  • NAKASHIMA Yasuhiko ID: 9000356885670

    Articles in CiNii:1

    • A prototype of Dimmable Visible Light Communication System on FPGA (ディペンダブルコンピューティング) (2017)
  • NAKASHIMA Yasuhiko ID: 9000363904823

    Articles in CiNii:1

    • An IoT Monitoring Prototype System for Smart Farm Using Zigbee and Raspberry Pi Module (無線通信システム) (2017)
  • NAKASHIMA YASUHIKO ID: 9000017548645

    Computing Architecture Lab, Graduate School of Information Science, Nara Institute of Science and Technology (2014 from CiNii)

    Articles in CiNii:7

    • A Light Bypass Network Design for Cascading ALU Executions (2009)
    • Exploiting Efficiency of Redundant Executions on an FU Array (2011)
    • Achieving Effective Fault Tolerance in FU array by Adding AVF Awareness (2012)
  • NAKASHIMA YASUHIKO ID: 9000272646384

    Computing Architecture Lab, Graduate School of Information Science, Nara Institute of Science and Technology (2014 from CiNii)

    Articles in CiNii:1

    • An Asynchronous Commit DMR Architecture for Aggressive Low-Power Fault Toleration (2014)
  • NAKASHIMA Yasuhiko ID: 1000000314170

    Articles in CiNii:245

    • A Hardware Assist for Scientific Visualization (2002)
    • Consideration to A Pseudo-Perspective Projection in Large Scale Volume Rendering (2003)
    • Implementation of A Large Scale Visualization Cluster Using Commodity GPU (2005)
  • NAKASHIMA Yasuhiko ID: 9000014606085

    Graduate School of Information Science, Nara Institute of Science and Technology (2012 from CiNii)

    Articles in CiNii:2

    • Quantum Walks on the Line with Phase Parameters (2012)
    • An efficient middle-level framework for quantum circuit simulation on multiple simulator platforms (2009)
  • NAKASHIMA Yasuhiko ID: 9000021001772

    Graduate School of Information Science, Nara Institute of Science and Technology (2011 from CiNii)

    Articles in CiNii:1

    • An Instruction Mapping Scheme for FU Array Accelerator (2011)
  • NAKASHIMA Yasuhiko ID: 9000240076602

    Graduate School of Information Science, Nara Institute of Science and Technology (2013 from CiNii)

    Articles in CiNii:1

    • Selective Check of Data-Path for Effective Fault Tolerance (2013)
  • NAKASHIMA Yasuhiko ID: 9000258734394

    the Graduate School of Information Science, Nara Institute of Science and Technology (2012 from CiNii)

    Articles in CiNii:1

    • RazorProtector : Maintaining Razor DVS Efficiency in Large IR-Drop Zones by an Adaptive Redundant Data-Path (2012)
  • NAKASHIMA Yasuhiko ID: 9000259338015

    the Graduate School of Information Science, Nara Institute of Science and Technology (2013 from CiNii)

    Articles in CiNii:1

    • Tensor Rank and Strong Quantum Nondeterminism in Multiparty Communication (2013)
  • NAKASHIMA Yasuhiko ID: 9000283335844

    Graduate School of Information Science, Nara Institute of Science and Technology (2014 from CiNii)

    Articles in CiNii:1

    • Understanding Variations for Better Adjusting Parallel Supplemental Redundant Executions to Tolerate Timing Faults (2014)
  • NAKASHIMA Yasuhiko ID: 9000283335846

    Nara Institute of Science and Technology (2014 from CiNii)

    Articles in CiNii:1

    • A Tightly Coupled General Purpose Reconfigurable Accelerator LAPP and Its Power States for HotSpot-Based Energy Reduction (2014)
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