Search Results1-4 of  4

  • SHIZUKU Yuzuru ID: 9000017547151

    Articles in CiNii:10

    • A 4-2 compressor using hybrid-CMOS logic style to reduce glitches in low-power multiplies (2009)
    • A 4-2 compressor using hybrid-CMOS logic style to reduce glitches in low-power multiplies (2009)
    • Circuit Design Techniques for Low Power Energy Harvesting System : Efficient DC-DC Boost Converter and Ultra-Low Power Digital Circuits (2015)
  • SHIZUKU Yuzuru ID: 9000311503556

    Department of Electrical and Electronic Engineering, Kobe University (2015 from CiNii)

    Articles in CiNii:1

    • An Energy-Efficient 24T Flip-Flop Consisting of Standard CMOS Gates for Ultra-Low Power Digital VLSIs (2015)
  • Shizuku Yuzuru ID: 9000283589629

    Department of Electrical and Electronic Engineering, Kobe University (2015 from CiNii)

    Articles in CiNii:1

    • Energy-efficient AES SubBytes transformation circuit using asynchronous circuits for ultra-low voltage operation (2015)
  • Shizuku Yuzuru ID: 9000388537985

    Articles in CiNii:1

    • An 80mV-to-1.8V Conversion-Range Low-Energy Level Shifter for Extremely Low-Voltage VLSIs (2017)
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