Search Results1-12 of  12

  • SUNG Suk Kang ID: 9000002173252

    Device Research Team (2006 from CiNii)

    Articles in CiNii:1

    • FinFET NAND Flash with Nitride/Si Nanocrystal/Nitride Hybrid Trap Layer (2006)
  • SUNG Suk Kang ID: 9000004781548

    Inter-University Semiconductor Research Center and School of Electrical Engineering and Computer Science, Seoul National University (2009 from CiNii)

    Articles in CiNii:23

    • 70nm NMOSFET Fabrication with 12nm n^+-p Junctions Using As^+_2 Low Energy Implantations (2001)
    • Single Electron Memory with a Defined Poly-Si Dot Based on Conventional VLSI Technology (2001)
    • Single Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Nano-Wire (2001)
  • Sung Suk Kang ID: 9000058611510

    Articles in CiNii:1

    • Fin-Type Field-Effect Transistor NAND Flash with Nitride/Silicon Nanocrystal/Nitride Hybrid Trap Layer (2007)
  • Sung Suk Kang ID: 9000401697821

    Articles in CiNii:1

    • 70 nm NMOSFET Fabrication with 12 nm n+-p Junctions Using As2+Low Energy Implantations (2001)
  • Sung Suk-Kang ID: 9000258160812

    Inter-University Semiconductor Research Center, School of Electrical Engineering, Seoul National University, San 56-1, Shinlim-dong, Kwanak-ku, Seoul 151-742, Korea (ROK) (2002 from CiNii)

    Articles in CiNii:1

    • Single-Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Nano-Wire. (2002)
  • Sung Suk-Kang ID: 9000258160860

    Inter-University Semiconductor Research Center, Seoul National University, Kwanak-gu, Seoul 151-742, Korea|School of Electrical Engineering, Seoul National University, San 56-1, Shinlim-dong, Kwanak-gu, Seoul 151-742, Korea (2002 from CiNii)

    Articles in CiNii:1

    • Single-Electron MOS Memory with a Defined Quantum Dot Based on Conventional VLSI Technology. (2002)
  • Sung Suk-Kang ID: 9000258162542

    Inter-University Semiconductor Research Center and School of Electrical Engineering, Seoul National University, San 56-1, Shinlim-dong, Kwanak-gu, Seoul 151-742, Korea (2002 from CiNii)

    Articles in CiNii:1

    • Nanoscale Multi-Line Patterning Using Sidewall Structure. (2002)
  • Sung Suk-Kang ID: 9000258179746

    Device Research Team, Semiconductor R&D Center, Samsung Electronics Co. (2005 from CiNii)

    Articles in CiNii:1

    • Highly Manufacturable and Reliable 80-nm Gate Twin Silicon-Oxide-Nitride-Oxide-Silicon Memory Transistor (2005)
  • Sung Suk-Kang ID: 9000401706271

    Articles in CiNii:1

    • Single-Electron Transistors with Sidewall Depletion Gates on a Silicon-On-Insulator Nano-Wire (2002)
  • Sung Suk-Kang ID: 9000401706304

    Articles in CiNii:1

    • Single-Electron MOS Memory with a Defined Quantum Dot Based on Conventional VLSI Technology (2002)
  • Sung Suk-Kang ID: 9000401708167

    Articles in CiNii:1

    • Nanoscale Multi-Line Patterning Using Sidewall Structure (2002)
  • Sung Suk-Kang ID: 9000401743239

    Articles in CiNii:1

    • Highly Manufacturable and Reliable 80-nm Gate Twin Silicon-Oxide-Nitride-Oxide-Silicon Memory Transistor (2005)
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